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| author | Andreas Gampe <agampe@google.com> | 2014-06-10 21:57:00 -0700 |
|---|---|---|
| committer | Andreas Gampe <agampe@google.com> | 2014-06-10 22:09:10 -0700 |
| commit | 624010286eea15c0526c2ff75341ddfd906332b1 (patch) | |
| tree | 5fc48d8179f6ec6942ebada59bc88c4626608410 | |
| parent | a23b630a4c0f85c6579cc4fdb79e4f00ffb0eda0 (diff) | |
| download | art-624010286eea15c0526c2ff75341ddfd906332b1.zip art-624010286eea15c0526c2ff75341ddfd906332b1.tar.gz art-624010286eea15c0526c2ff75341ddfd906332b1.tar.bz2 | |
ART: Fix MIPS build
Wrong name for an assembly file. Also, registers need $ prefix
in our assembler.
Change-Id: Ic2d5961ec7d0c8e65ca5b27d681487da847c9065
| -rw-r--r-- | runtime/Android.mk | 2 | ||||
| -rw-r--r-- | runtime/arch/mips/memcmp16_mips.S | 32 |
2 files changed, 17 insertions, 17 deletions
diff --git a/runtime/Android.mk b/runtime/Android.mk index 52b5f43..8f8eeba 100644 --- a/runtime/Android.mk +++ b/runtime/Android.mk @@ -256,7 +256,7 @@ LIBART_TARGET_SRC_FILES_mips := \ arch/mips/context_mips.cc \ arch/mips/entrypoints_init_mips.cc \ arch/mips/jni_entrypoints_mips.S \ - arch/mips/memcmp16.S \ + arch/mips/memcmp16_mips.S \ arch/mips/portable_entrypoints_mips.S \ arch/mips/quick_entrypoints_mips.S \ arch/mips/thread_mips.cc \ diff --git a/runtime/arch/mips/memcmp16_mips.S b/runtime/arch/mips/memcmp16_mips.S index 571ad75..0196edc 100644 --- a/runtime/arch/mips/memcmp16_mips.S +++ b/runtime/arch/mips/memcmp16_mips.S @@ -17,27 +17,27 @@ #ifndef ART_RUNTIME_ARCH_MIPS_MEMCMP16_MIPS_S_ #define ART_RUNTIME_ARCH_MIPS_MEMCMP16_MIPS_S_ -#include "asm_support_mips.h" +#include "asm_support_mips.S" // u4 __memcmp16(const u2*, const u2*, size_t); -ENTRY(__memcmp16) - li t0,0 - li t1,0 - beqz a2,done /* 0 length string */ - beq a0,a1,done /* strings are identical */ +ENTRY __memcmp16 + li $t0,0 + li $t1,0 + beqz $a2,done /* 0 length string */ + beq $a0,$a1,done /* strings are identical */ /* Unoptimised... */ -1: lhu t0,0(a0) - lhu t1,0(a1) - addu a1,2 - bne t0,t1,done - addu a0,2 - subu a2,1 - bnez a2,1b +1: lhu $t0,0($a0) + lhu $t1,0($a1) + addu $a1,2 + bne $t0,$t1,done + addu $a0,2 + subu $a2,1 + bnez $a2,1b done: - subu v0,t0,t1 - j ra -END(__memcmp16) + subu $v0,$t0,$t1 + j $ra +END __memcmp16 #endif // ART_RUNTIME_ARCH_MIPS_MEMCMP16_MIPS_S_ |