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| author | buzbee <buzbee@google.com> | 2014-04-27 19:33:22 -0700 |
|---|---|---|
| committer | buzbee <buzbee@google.com> | 2014-04-27 19:33:22 -0700 |
| commit | fd698e67953e40e804d7c9d1a3e8460e9d67382a (patch) | |
| tree | 4d577e785a0d93e22a4abddd7b5de61ee07f0e2f | |
| parent | 0db6d06d1e4dec2ac36ca9c085876eea40d46a50 (diff) | |
| download | art-fd698e67953e40e804d7c9d1a3e8460e9d67382a.zip art-fd698e67953e40e804d7c9d1a3e8460e9d67382a.tar.gz art-fd698e67953e40e804d7c9d1a3e8460e9d67382a.tar.bz2 | |
Quick compiler: fix DCHECKS
The recent change to introduce k32, k64 and kReference operand
sizes missed updating a few DCHECKS.
Change-Id: I66eb617b07766e781b38962dc862fc5b023c2fbd
| -rw-r--r-- | compiler/dex/quick/arm/utility_arm.cc | 4 | ||||
| -rw-r--r-- | compiler/dex/quick/mips/utility_mips.cc | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/compiler/dex/quick/arm/utility_arm.cc b/compiler/dex/quick/arm/utility_arm.cc index 6879ffc..2e64f74 100644 --- a/compiler/dex/quick/arm/utility_arm.cc +++ b/compiler/dex/quick/arm/utility_arm.cc @@ -699,7 +699,7 @@ LIR* ArmMir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStora if (ARM_FPREG(r_dest.GetReg())) { if (ARM_SINGLEREG(r_dest.GetReg())) { - DCHECK((size == k32) || (size == kSingle)); + DCHECK((size == k32) || (size == kSingle) || (size == kReference)); opcode = kThumb2Vldrs; size = kSingle; } else { @@ -767,7 +767,7 @@ LIR* ArmMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegStor if (ARM_FPREG(r_src.GetReg())) { if (ARM_SINGLEREG(r_src.GetReg())) { - DCHECK((size == k32) || (size == kSingle)); + DCHECK((size == k32) || (size == kSingle) || (size == kReference)); opcode = kThumb2Vstrs; size = kSingle; } else { diff --git a/compiler/dex/quick/mips/utility_mips.cc b/compiler/dex/quick/mips/utility_mips.cc index 12775e1..a865430 100644 --- a/compiler/dex/quick/mips/utility_mips.cc +++ b/compiler/dex/quick/mips/utility_mips.cc @@ -357,7 +357,7 @@ LIR* MipsMir2Lir::LoadBaseIndexed(RegStorage r_base, RegStorage r_index, RegStor if (MIPS_FPREG(r_dest.GetReg())) { DCHECK(MIPS_SINGLEREG(r_dest.GetReg())); - DCHECK((size == k32) || (size == kSingle)); + DCHECK((size == k32) || (size == kSingle) || (size == kReference)); size = kSingle; } else { if (size == kSingle) @@ -409,7 +409,7 @@ LIR* MipsMir2Lir::StoreBaseIndexed(RegStorage r_base, RegStorage r_index, RegSto if (MIPS_FPREG(r_src.GetReg())) { DCHECK(MIPS_SINGLEREG(r_src.GetReg())); - DCHECK((size == k32) || (size == kSingle)); + DCHECK((size == k32) || (size == kSingle) || (size == kReference)); size = kSingle; } else { if (size == kSingle) |