diff options
author | Ian Rogers <irogers@google.com> | 2014-02-01 07:15:02 +0000 |
---|---|---|
committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2014-02-01 07:15:02 +0000 |
commit | 316116b8f11998fa07e532366482ae9493c1a1c6 (patch) | |
tree | 2013c104f6f58f315ffabc51566c53ca11b4e009 | |
parent | 5ca04c132913689d6521c5b3d53b89aae5e398a8 (diff) | |
parent | a0dac3e82231654be01be1e31a62dd40ea4a03a6 (diff) | |
download | art-316116b8f11998fa07e532366482ae9493c1a1c6.zip art-316116b8f11998fa07e532366482ae9493c1a1c6.tar.gz art-316116b8f11998fa07e532366482ae9493c1a1c6.tar.bz2 |
Merge "Remove redundant compare for x86 OpDecAndBranch"
-rw-r--r-- | compiler/dex/quick/x86/int_x86.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/dex/quick/x86/int_x86.cc b/compiler/dex/quick/x86/int_x86.cc index 793a94f..e458e5f 100644 --- a/compiler/dex/quick/x86/int_x86.cc +++ b/compiler/dex/quick/x86/int_x86.cc @@ -830,7 +830,7 @@ LIR* X86Mir2Lir::OpTestSuspend(LIR* target) { // Decrement register and branch on condition LIR* X86Mir2Lir::OpDecAndBranch(ConditionCode c_code, int reg, LIR* target) { OpRegImm(kOpSub, reg, 1); - return OpCmpImmBranch(c_code, reg, 0, target); + return OpCondBranch(c_code, target); } bool X86Mir2Lir::SmallLiteralDivRem(Instruction::Code dalvik_opcode, bool is_div, |