summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBill Buzbee <buzbee@android.com>2014-04-04 14:00:12 +0000
committerGerrit Code Review <noreply-gerritcodereview@google.com>2014-04-04 14:00:13 +0000
commit764c798b57b7baa04885fcdf5eba5708a01b9edc (patch)
treeee84fc3b1ead3569acd66c106e009afc8b8c8f05
parent09dfce73c4e849afda37035146dd2932220708d3 (diff)
parentcbd18b7f4da7677ca48c48c23ed9a7de3a8b0354 (diff)
downloadart-764c798b57b7baa04885fcdf5eba5708a01b9edc.zip
art-764c798b57b7baa04885fcdf5eba5708a01b9edc.tar.gz
art-764c798b57b7baa04885fcdf5eba5708a01b9edc.tar.bz2
Merge "Fix LoadValueWide to not call MarkLive for high reg that is equal to low reg"
-rw-r--r--compiler/dex/quick/gen_loadstore.cc7
1 files changed, 6 insertions, 1 deletions
diff --git a/compiler/dex/quick/gen_loadstore.cc b/compiler/dex/quick/gen_loadstore.cc
index 897d86d..208eadd 100644
--- a/compiler/dex/quick/gen_loadstore.cc
+++ b/compiler/dex/quick/gen_loadstore.cc
@@ -211,7 +211,12 @@ RegLocation Mir2Lir::LoadValueWide(RegLocation rl_src, RegisterClass op_kind) {
LoadValueDirectWide(rl_src, rl_src.reg);
rl_src.location = kLocPhysReg;
MarkLive(rl_src.reg.GetLow(), rl_src.s_reg_low);
- MarkLive(rl_src.reg.GetHigh(), GetSRegHi(rl_src.s_reg_low));
+ if (rl_src.reg.GetLowReg() != rl_src.reg.GetHighReg()) {
+ MarkLive(rl_src.reg.GetHigh(), GetSRegHi(rl_src.s_reg_low));
+ } else {
+ // This must be an x86 vector register value.
+ DCHECK(IsFpReg(rl_src.reg) && (cu_->instruction_set == kX86 || cu_->instruction_set == kX86_64));
+ }
}
return rl_src;
}