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| author | nikolay serdjuk <nikolay.y.serdjuk@intel.com> | 2015-04-27 17:52:57 +0600 |
|---|---|---|
| committer | Vladimir Marko <vmarko@google.com> | 2015-04-29 13:13:50 +0100 |
| commit | dd17bc3806e800d3b82d5cb27e85ccc1c4e2ee1d (patch) | |
| tree | ba05dcae43e620e16e02a4cf4063592fbfb36fb9 | |
| parent | a81a746cad998e4cbfb7b18193879d8d1e1f8772 (diff) | |
| download | art-dd17bc3806e800d3b82d5cb27e85ccc1c4e2ee1d.zip art-dd17bc3806e800d3b82d5cb27e85ccc1c4e2ee1d.tar.gz art-dd17bc3806e800d3b82d5cb27e85ccc1c4e2ee1d.tar.bz2 | |
Fix for incorrect encode and parse of PEXTRW instruction
The instruction PEXTRW encoded by sequence 66 0F 3A 15
was incorrectly encoded in compiler table and incorrectly
parsed by disassembler.
Signed-off-by: nikolay serdjuk <nikolay.y.serdjuk@intel.com>
(cherry picked from commit e0705f51fdc71e9670a29f8c3a47168f50724b35)
Change-Id: I7f051e23789aa3745d6eb854c97f80c475748b74
| -rw-r--r-- | compiler/dex/quick/x86/assemble_x86.cc | 2 | ||||
| -rw-r--r-- | compiler/dex/quick/x86/quick_assemble_x86_test.cc | 7 | ||||
| -rw-r--r-- | disassembler/disassembler_x86.cc | 8 |
3 files changed, 16 insertions, 1 deletions
diff --git a/compiler/dex/quick/x86/assemble_x86.cc b/compiler/dex/quick/x86/assemble_x86.cc index 934fa35..8467b71 100644 --- a/compiler/dex/quick/x86/assemble_x86.cc +++ b/compiler/dex/quick/x86/assemble_x86.cc @@ -428,7 +428,7 @@ ENCODING_MAP(Cmp, IS_LOAD, 0, 0, { kX86PextrwRRI, kRegRegImm, IS_TERTIARY_OP | REG_DEF0 | REG_USE1, { 0x66, 0, 0x0F, 0xC5, 0x00, 0, 0, 1, false }, "PextwRRI", "!0r,!1r,!2d" }, { kX86PextrdRRI, kRegRegImmStore, IS_TERTIARY_OP | REG_DEF0 | REG_USE1, { 0x66, 0, 0x0F, 0x3A, 0x16, 0, 0, 1, false }, "PextdRRI", "!0r,!1r,!2d" }, { kX86PextrbMRI, kMemRegImm, IS_QUAD_OP | REG_USE02 | IS_STORE, { 0x66, 0, 0x0F, 0x3A, 0x16, 0, 0, 1, false }, "PextrbMRI", "[!0r+!1d],!2r,!3d" }, - { kX86PextrwMRI, kMemRegImm, IS_QUAD_OP | REG_USE02 | IS_STORE, { 0x66, 0, 0x0F, 0x3A, 0x16, 0, 0, 1, false }, "PextrwMRI", "[!0r+!1d],!2r,!3d" }, + { kX86PextrwMRI, kMemRegImm, IS_QUAD_OP | REG_USE02 | IS_STORE, { 0x66, 0, 0x0F, 0x3A, 0x15, 0, 0, 1, false }, "PextrwMRI", "[!0r+!1d],!2r,!3d" }, { kX86PextrdMRI, kMemRegImm, IS_QUAD_OP | REG_USE02 | IS_STORE, { 0x66, 0, 0x0F, 0x3A, 0x16, 0, 0, 1, false }, "PextrdMRI", "[!0r+!1d],!2r,!3d" }, { kX86PshuflwRRI, kRegRegImm, IS_TERTIARY_OP | REG_DEF0 | REG_USE1, { 0xF2, 0, 0x0F, 0x70, 0, 0, 0, 1, false }, "PshuflwRRI", "!0r,!1r,!2d" }, diff --git a/compiler/dex/quick/x86/quick_assemble_x86_test.cc b/compiler/dex/quick/x86/quick_assemble_x86_test.cc index 36339f7..f58f206 100644 --- a/compiler/dex/quick/x86/quick_assemble_x86_test.cc +++ b/compiler/dex/quick/x86/quick_assemble_x86_test.cc @@ -180,6 +180,13 @@ TEST_F(QuickAssembleX86LowLevelTest, Mulpd) { RegStorage::Solo128(0).GetReg(), RegStorage::Solo128(1).GetReg()); } +TEST_F(QuickAssembleX86LowLevelTest, Pextrw) { + Test(kX86, "Pextrw", "pextrw $7, %xmm3, 8(%eax)\n", kX86PextrwMRI, + RegStorage::Solo32(r0).GetReg(), 8, RegStorage::Solo128(3).GetReg(), 7); + Test(kX86_64, "Pextrw", "pextrw $7, %xmm8, 8(%r10)\n", kX86PextrwMRI, + RegStorage::Solo64(r10q).GetReg(), 8, RegStorage::Solo128(8).GetReg(), 7); +} + class QuickAssembleX86MacroTest : public QuickAssembleX86TestBase { protected: typedef void (X86Mir2Lir::*AsmFn)(MIR*); diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc index ba0c0bd..2ead4a2 100644 --- a/disassembler/disassembler_x86.cc +++ b/disassembler/disassembler_x86.cc @@ -587,6 +587,14 @@ DISASSEMBLER_ENTRY(cmp, src_reg_file = SSE; immediate_bytes = 1; break; + case 0x15: + opcode1 = "pextrw"; + prefix[2] = 0; + has_modrm = true; + store = true; + src_reg_file = SSE; + immediate_bytes = 1; + break; case 0x16: opcode1 = "pextrd"; prefix[2] = 0; |