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authorDouglas Leung <douglas@mips.com>2014-07-09 14:28:35 -0700
committerDouglas Leung <douglas@mips.com>2014-07-15 18:39:57 -0700
commitd9cb8ae2ed78f957a773af61759432d7a7bf78af (patch)
tree884d76d6e47193f704a7c7cb27c9a6c1ed2b49f3 /compiler/dex/quick/arm64/codegen_arm64.h
parentebaca192314e21d26b97646fa962e468ff07b893 (diff)
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Fix art test failures for Mips.
This patch fixes the following art test failures for Mips: 003-omnibus-opcodes 030-bad-finalizer 041-narrowing 059-finalizer-throw Change-Id: I4e0e9ff75f949c92059dd6b8d579450dc15f4467 Signed-off-by: Douglas Leung <douglas@mips.com>
Diffstat (limited to 'compiler/dex/quick/arm64/codegen_arm64.h')
-rw-r--r--compiler/dex/quick/arm64/codegen_arm64.h2
1 files changed, 0 insertions, 2 deletions
diff --git a/compiler/dex/quick/arm64/codegen_arm64.h b/compiler/dex/quick/arm64/codegen_arm64.h
index de97653..c62b4fe 100644
--- a/compiler/dex/quick/arm64/codegen_arm64.h
+++ b/compiler/dex/quick/arm64/codegen_arm64.h
@@ -146,8 +146,6 @@ class Arm64Mir2Lir FINAL : public Mir2Lir {
size_t GetInsnSize(LIR* lir) OVERRIDE;
bool IsUnconditionalBranch(LIR* lir);
- // Check support for volatile load/store of a given size.
- bool SupportsVolatileLoadStore(OpSize size) OVERRIDE;
// Get the register class for load/store of a field.
RegisterClass RegClassForFieldLoadStore(OpSize size, bool is_volatile) OVERRIDE;