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author | Brian Carlstrom <bdc@google.com> | 2013-07-17 17:44:30 -0700 |
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committer | Brian Carlstrom <bdc@google.com> | 2013-07-17 21:46:11 -0700 |
commit | 2ce745c06271d5223d57dbf08117b20d5b60694a (patch) | |
tree | 08ca327d1f1c8266fafb11422cfad6982f21e0bb /compiler/dex/quick/local_optimizations.cc | |
parent | fc0e3219edc9a5bf81b166e82fd5db2796eb6a0d (diff) | |
download | art-2ce745c06271d5223d57dbf08117b20d5b60694a.zip art-2ce745c06271d5223d57dbf08117b20d5b60694a.tar.gz art-2ce745c06271d5223d57dbf08117b20d5b60694a.tar.bz2 |
Fix cpplint whitespace/braces issues
Change-Id: Ide80939faf8e8690d8842dde8133902ac725ed1a
Diffstat (limited to 'compiler/dex/quick/local_optimizations.cc')
-rw-r--r-- | compiler/dex/quick/local_optimizations.cc | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/compiler/dex/quick/local_optimizations.cc b/compiler/dex/quick/local_optimizations.cc index ac654d8..eb27bf8 100644 --- a/compiler/dex/quick/local_optimizations.cc +++ b/compiler/dex/quick/local_optimizations.cc @@ -29,8 +29,7 @@ namespace art { #define LDLD_DISTANCE 4 #define LD_LATENCY 2 -static bool IsDalvikRegisterClobbered(LIR* lir1, LIR* lir2) -{ +static bool IsDalvikRegisterClobbered(LIR* lir1, LIR* lir2) { int reg1Lo = DECODE_ALIAS_INFO_REG(lir1->alias_info); int reg1Hi = reg1Lo + DECODE_ALIAS_INFO_WIDE(lir1->alias_info); int reg2Lo = DECODE_ALIAS_INFO_REG(lir2->alias_info); @@ -40,8 +39,7 @@ static bool IsDalvikRegisterClobbered(LIR* lir1, LIR* lir2) } /* Convert a more expensive instruction (ie load) into a move */ -void Mir2Lir::ConvertMemOpIntoMove(LIR* orig_lir, int dest, int src) -{ +void Mir2Lir::ConvertMemOpIntoMove(LIR* orig_lir, int dest, int src) { /* Insert a move to replace the load */ LIR* move_lir; move_lir = OpRegCopyNoInsert(dest, src); @@ -72,8 +70,7 @@ void Mir2Lir::ConvertMemOpIntoMove(LIR* orig_lir, int dest, int src) * 1) They are must-aliases * 2) The memory location is not written to in between */ -void Mir2Lir::ApplyLoadStoreElimination(LIR* head_lir, LIR* tail_lir) -{ +void Mir2Lir::ApplyLoadStoreElimination(LIR* head_lir, LIR* tail_lir) { LIR* this_lir; if (head_lir == tail_lir) return; @@ -268,8 +265,7 @@ void Mir2Lir::ApplyLoadStoreElimination(LIR* head_lir, LIR* tail_lir) * Perform a pass of bottom-up walk, from the second instruction in the * superblock, to try to hoist loads to earlier slots. */ -void Mir2Lir::ApplyLoadHoisting(LIR* head_lir, LIR* tail_lir) -{ +void Mir2Lir::ApplyLoadHoisting(LIR* head_lir, LIR* tail_lir) { LIR* this_lir, *check_lir; /* * Store the list of independent instructions that can be hoisted past. @@ -447,8 +443,7 @@ void Mir2Lir::ApplyLoadHoisting(LIR* head_lir, LIR* tail_lir) } } -void Mir2Lir::ApplyLocalOptimizations(LIR* head_lir, LIR* tail_lir) -{ +void Mir2Lir::ApplyLocalOptimizations(LIR* head_lir, LIR* tail_lir) { if (!(cu_->disable_opt & (1 << kLoadStoreElimination))) { ApplyLoadStoreElimination(head_lir, tail_lir); } @@ -462,8 +457,7 @@ void Mir2Lir::ApplyLocalOptimizations(LIR* head_lir, LIR* tail_lir) * Note: new redundant branches may be inserted later, and we'll * use a check in final instruction assembly to nop those out. */ -void Mir2Lir::RemoveRedundantBranches() -{ +void Mir2Lir::RemoveRedundantBranches() { LIR* this_lir; for (this_lir = first_lir_insn_; this_lir != last_lir_insn_; this_lir = NEXT_LIR(this_lir)) { |