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| author | Douglas Leung <douglas.leung@imgtec.com> | 2015-04-07 13:25:56 -0700 |
|---|---|---|
| committer | Douglas Leung <douglas.leung@imgtec.com> | 2015-04-07 18:32:05 -0700 |
| commit | 7fa6e279dfda5b2f21e4c234f562a49a5fe5d218 (patch) | |
| tree | 99adc4db98960c636d9f8fe2fa7afb16c4caeaa6 /compiler/dex/quick | |
| parent | d2b9c0ca73a01cc31482a54cbcae1b3ac85379b8 (diff) | |
| download | art-7fa6e279dfda5b2f21e4c234f562a49a5fe5d218.zip art-7fa6e279dfda5b2f21e4c234f562a49a5fe5d218.tar.gz art-7fa6e279dfda5b2f21e4c234f562a49a5fe5d218.tar.bz2 | |
Fix GenDivRemLit() for Mips.
This bug was reported by Ingenic where the result is incorrect if
we divide a number by an unsigned 16-bit constant with its
MSB bit (bit 15) set.
Change-Id: I53d2599918cc47b1a9809160310716dca67ef243
Diffstat (limited to 'compiler/dex/quick')
| -rw-r--r-- | compiler/dex/quick/mips/int_mips.cc | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/compiler/dex/quick/mips/int_mips.cc b/compiler/dex/quick/mips/int_mips.cc index 626b36e..290a7bd 100644 --- a/compiler/dex/quick/mips/int_mips.cc +++ b/compiler/dex/quick/mips/int_mips.cc @@ -309,7 +309,13 @@ RegLocation MipsMir2Lir::GenDivRem(RegLocation rl_dest, RegStorage reg1, RegStor RegLocation MipsMir2Lir::GenDivRemLit(RegLocation rl_dest, RegStorage reg1, int lit, bool is_div) { RegStorage t_reg = AllocTemp(); - NewLIR3(kMipsAddiu, t_reg.GetReg(), rZERO, lit); + // lit is guarantee to be a 16-bit constant + if (IsUint<16>(lit)) { + NewLIR3(kMipsOri, t_reg.GetReg(), rZERO, lit); + } else { + // Addiu will sign extend the entire width (32 or 64) of the register. + NewLIR3(kMipsAddiu, t_reg.GetReg(), rZERO, lit); + } RegLocation rl_result = GenDivRem(rl_dest, reg1, t_reg, is_div); FreeTemp(t_reg); return rl_result; |