ARM64: Remove suspend register.

It also clean up build/remove frame used by JNI compiler and generates
stp/ldp instead of str/ldr. Also x19 has been unblocked in both quick and
optimizing compiler.

Change-Id: Idbeac0942265f493266b2ef9b7a65bb4054f0e2d

2 files changed, 114 insertions, 137 deletions

diff --git a/compiler/jni/jni_cfi_test_expected.inc b/compiler/jni/jni_cfi_test_expected.inc
index 47e6f10..eaf7872 100644
--- a/compiler/jni/jni_cfi_test_expected.inc
+++ b/compiler/jni/jni_cfi_test_expected.inc
@@ -81,132 +81,109 @@ static constexpr uint8_t expected_cfi_kThumb2[] = {
 // 0x0000002a: .cfi_def_cfa_offset: 128
 
 static constexpr uint8_t expected_asm_kArm64[] = {
-    0xFF, 0x03, 0x03, 0xD1, 0xFE, 0x5F, 0x00, 0xF9, 0xFD, 0x5B, 0x00, 0xF9,
-    0xFC, 0x57, 0x00, 0xF9, 0xFB, 0x53, 0x00, 0xF9, 0xFA, 0x4F, 0x00, 0xF9,
-    0xF9, 0x4B, 0x00, 0xF9, 0xF8, 0x47, 0x00, 0xF9, 0xF7, 0x43, 0x00, 0xF9,
-    0xF6, 0x3F, 0x00, 0xF9, 0xF5, 0x3B, 0x00, 0xF9, 0xF4, 0x37, 0x00, 0xF9,
-    0xEF, 0x33, 0x00, 0xFD, 0xEE, 0x2F, 0x00, 0xFD, 0xED, 0x2B, 0x00, 0xFD,
-    0xEC, 0x27, 0x00, 0xFD, 0xEB, 0x23, 0x00, 0xFD, 0xEA, 0x1F, 0x00, 0xFD,
-    0xE9, 0x1B, 0x00, 0xFD, 0xE8, 0x17, 0x00, 0xFD, 0xF5, 0x03, 0x12, 0xAA,
+    0xFF, 0x03, 0x03, 0xD1, 0xF3, 0x53, 0x06, 0xA9, 0xF5, 0x5B, 0x07, 0xA9,
+    0xF7, 0x63, 0x08, 0xA9, 0xF9, 0x6B, 0x09, 0xA9, 0xFB, 0x73, 0x0A, 0xA9,
+    0xFD, 0x7B, 0x0B, 0xA9, 0xE8, 0x27, 0x02, 0x6D, 0xEA, 0x2F, 0x03, 0x6D,
+    0xEC, 0x37, 0x04, 0x6D, 0xEE, 0x3F, 0x05, 0x6D, 0xF5, 0x03, 0x12, 0xAA,
     0xE0, 0x03, 0x00, 0xB9, 0xE1, 0xC7, 0x00, 0xB9, 0xE0, 0xCB, 0x00, 0xBD,
     0xE2, 0xCF, 0x00, 0xB9, 0xE3, 0xD3, 0x00, 0xB9, 0xFF, 0x83, 0x00, 0xD1,
-    0xFF, 0x83, 0x00, 0x91, 0xF2, 0x03, 0x15, 0xAA, 0xFE, 0x5F, 0x40, 0xF9,
-    0xFD, 0x5B, 0x40, 0xF9, 0xFC, 0x57, 0x40, 0xF9, 0xFB, 0x53, 0x40, 0xF9,
-    0xFA, 0x4F, 0x40, 0xF9, 0xF9, 0x4B, 0x40, 0xF9, 0xF8, 0x47, 0x40, 0xF9,
-    0xF7, 0x43, 0x40, 0xF9, 0xF6, 0x3F, 0x40, 0xF9, 0xF5, 0x3B, 0x40, 0xF9,
-    0xF4, 0x37, 0x40, 0xF9, 0xEF, 0x33, 0x40, 0xFD, 0xEE, 0x2F, 0x40, 0xFD,
-    0xED, 0x2B, 0x40, 0xFD, 0xEC, 0x27, 0x40, 0xFD, 0xEB, 0x23, 0x40, 0xFD,
-    0xEA, 0x1F, 0x40, 0xFD, 0xE9, 0x1B, 0x40, 0xFD, 0xE8, 0x17, 0x40, 0xFD,
+    0xFF, 0x83, 0x00, 0x91, 0xF2, 0x03, 0x15, 0xAA, 0xF3, 0x53, 0x46, 0xA9,
+    0xF5, 0x5B, 0x47, 0xA9, 0xF7, 0x63, 0x48, 0xA9, 0xF9, 0x6B, 0x49, 0xA9,
+    0xFB, 0x73, 0x4A, 0xA9, 0xFD, 0x7B, 0x4B, 0xA9, 0xE8, 0x27, 0x42, 0x6D,
+    0xEA, 0x2F, 0x43, 0x6D, 0xEC, 0x37, 0x44, 0x6D, 0xEE, 0x3F, 0x45, 0x6D,
     0xFF, 0x03, 0x03, 0x91, 0xC0, 0x03, 0x5F, 0xD6,
 };
 static constexpr uint8_t expected_cfi_kArm64[] = {
-    0x44, 0x0E, 0xC0, 0x01, 0x44, 0x9E, 0x02, 0x44, 0x9D, 0x04, 0x44, 0x9C,
-    0x06, 0x44, 0x9B, 0x08, 0x44, 0x9A, 0x0A, 0x44, 0x99, 0x0C, 0x44, 0x98,
-    0x0E, 0x44, 0x97, 0x10, 0x44, 0x96, 0x12, 0x44, 0x95, 0x14, 0x44, 0x94,
-    0x16, 0x44, 0x05, 0x4F, 0x18, 0x44, 0x05, 0x4E, 0x1A, 0x44, 0x05, 0x4D,
-    0x1C, 0x44, 0x05, 0x4C, 0x1E, 0x44, 0x05, 0x4B, 0x20, 0x44, 0x05, 0x4A,
-    0x22, 0x44, 0x05, 0x49, 0x24, 0x44, 0x05, 0x48, 0x26, 0x5C, 0x0E, 0xE0,
-    0x01, 0x44, 0x0E, 0xC0, 0x01, 0x0A, 0x48, 0xDE, 0x44, 0xDD, 0x44, 0xDC,
-    0x44, 0xDB, 0x44, 0xDA, 0x44, 0xD9, 0x44, 0xD8, 0x44, 0xD7, 0x44, 0xD6,
-    0x44, 0xD5, 0x44, 0xD4, 0x44, 0x06, 0x4F, 0x44, 0x06, 0x4E, 0x44, 0x06,
-    0x4D, 0x44, 0x06, 0x4C, 0x44, 0x06, 0x4B, 0x44, 0x06, 0x4A, 0x44, 0x06,
-    0x49, 0x44, 0x06, 0x48, 0x44, 0x0E, 0x00, 0x44, 0x0B, 0x0E, 0xC0, 0x01,
+    0x44, 0x0E, 0xC0, 0x01, 0x44, 0x93, 0x18, 0x94, 0x16, 0x44, 0x95, 0x14,
+    0x96, 0x12, 0x44, 0x97, 0x10, 0x98, 0x0E, 0x44, 0x99, 0x0C, 0x9A, 0x0A,
+    0x44, 0x9B, 0x08, 0x9C, 0x06, 0x44, 0x9D, 0x04, 0x9E, 0x02, 0x44, 0x05,
+    0x48, 0x28, 0x05, 0x49, 0x26, 0x44, 0x05, 0x4A, 0x24, 0x05, 0x4B, 0x22,
+    0x44, 0x05, 0x4C, 0x20, 0x05, 0x4D, 0x1E, 0x44, 0x05, 0x4E, 0x1C, 0x05,
+    0x4F, 0x1A, 0x5C, 0x0E, 0xE0, 0x01, 0x44, 0x0E, 0xC0, 0x01, 0x44, 0x0A,
+    0x44, 0xD3, 0xD4, 0x44, 0xD5, 0xD6, 0x44, 0xD7, 0xD8, 0x44, 0xD9, 0xDA,
+    0x44, 0xDB, 0xDC, 0x44, 0xDD, 0xDE, 0x44, 0x06, 0x48, 0x06, 0x49, 0x44,
+    0x06, 0x4A, 0x06, 0x4B, 0x44, 0x06, 0x4C, 0x06, 0x4D, 0x44, 0x06, 0x4E,
+    0x06, 0x4F, 0x44, 0x0E, 0x00, 0x44, 0x0B, 0x0E, 0xC0, 0x01,
 };
 // 0x00000000: sub sp, sp, #0xc0 (192)
 // 0x00000004: .cfi_def_cfa_offset: 192
-// 0x00000004: str lr, [sp, #184]
-// 0x00000008: .cfi_offset: r30 at cfa-8
-// 0x00000008: str x29, [sp, #176]
-// 0x0000000c: .cfi_offset: r29 at cfa-16
-// 0x0000000c: str x28, [sp, #168]
-// 0x00000010: .cfi_offset: r28 at cfa-24
-// 0x00000010: str x27, [sp, #160]
-// 0x00000014: .cfi_offset: r27 at cfa-32
-// 0x00000014: str x26, [sp, #152]
-// 0x00000018: .cfi_offset: r26 at cfa-40
-// 0x00000018: str x25, [sp, #144]
-// 0x0000001c: .cfi_offset: r25 at cfa-48
-// 0x0000001c: str x24, [sp, #136]
-// 0x00000020: .cfi_offset: r24 at cfa-56
-// 0x00000020: str x23, [sp, #128]
-// 0x00000024: .cfi_offset: r23 at cfa-64
-// 0x00000024: str x22, [sp, #120]
-// 0x00000028: .cfi_offset: r22 at cfa-72
-// 0x00000028: str x21, [sp, #112]
-// 0x0000002c: .cfi_offset: r21 at cfa-80
-// 0x0000002c: str x20, [sp, #104]
-// 0x00000030: .cfi_offset: r20 at cfa-88
-// 0x00000030: str d15, [sp, #96]
-// 0x00000034: .cfi_offset_extended: r79 at cfa-96
-// 0x00000034: str d14, [sp, #88]
-// 0x00000038: .cfi_offset_extended: r78 at cfa-104
-// 0x00000038: str d13, [sp, #80]
-// 0x0000003c: .cfi_offset_extended: r77 at cfa-112
-// 0x0000003c: str d12, [sp, #72]
-// 0x00000040: .cfi_offset_extended: r76 at cfa-120
-// 0x00000040: str d11, [sp, #64]
-// 0x00000044: .cfi_offset_extended: r75 at cfa-128
-// 0x00000044: str d10, [sp, #56]
-// 0x00000048: .cfi_offset_extended: r74 at cfa-136
-// 0x00000048: str d9, [sp, #48]
-// 0x0000004c: .cfi_offset_extended: r73 at cfa-144
-// 0x0000004c: str d8, [sp, #40]
-// 0x00000050: .cfi_offset_extended: r72 at cfa-152
-// 0x00000050: mov x21, tr
-// 0x00000054: str w0, [sp]
-// 0x00000058: str w1, [sp, #196]
-// 0x0000005c: str s0, [sp, #200]
-// 0x00000060: str w2, [sp, #204]
-// 0x00000064: str w3, [sp, #208]
-// 0x00000068: sub sp, sp, #0x20 (32)
-// 0x0000006c: .cfi_def_cfa_offset: 224
-// 0x0000006c: add sp, sp, #0x20 (32)
-// 0x00000070: .cfi_def_cfa_offset: 192
-// 0x00000070: .cfi_remember_state
-// 0x00000070: mov tr, x21
-// 0x00000074: ldr lr, [sp, #184]
-// 0x00000078: .cfi_restore: r30
-// 0x00000078: ldr x29, [sp, #176]
-// 0x0000007c: .cfi_restore: r29
-// 0x0000007c: ldr x28, [sp, #168]
-// 0x00000080: .cfi_restore: r28
-// 0x00000080: ldr x27, [sp, #160]
-// 0x00000084: .cfi_restore: r27
-// 0x00000084: ldr x26, [sp, #152]
-// 0x00000088: .cfi_restore: r26
-// 0x00000088: ldr x25, [sp, #144]
-// 0x0000008c: .cfi_restore: r25
-// 0x0000008c: ldr x24, [sp, #136]
-// 0x00000090: .cfi_restore: r24
-// 0x00000090: ldr x23, [sp, #128]
-// 0x00000094: .cfi_restore: r23
-// 0x00000094: ldr x22, [sp, #120]
-// 0x00000098: .cfi_restore: r22
-// 0x00000098: ldr x21, [sp, #112]
-// 0x0000009c: .cfi_restore: r21
-// 0x0000009c: ldr x20, [sp, #104]
-// 0x000000a0: .cfi_restore: r20
-// 0x000000a0: ldr d15, [sp, #96]
-// 0x000000a4: .cfi_restore_extended: r79
-// 0x000000a4: ldr d14, [sp, #88]
-// 0x000000a8: .cfi_restore_extended: r78
-// 0x000000a8: ldr d13, [sp, #80]
-// 0x000000ac: .cfi_restore_extended: r77
-// 0x000000ac: ldr d12, [sp, #72]
-// 0x000000b0: .cfi_restore_extended: r76
-// 0x000000b0: ldr d11, [sp, #64]
-// 0x000000b4: .cfi_restore_extended: r75
-// 0x000000b4: ldr d10, [sp, #56]
-// 0x000000b8: .cfi_restore_extended: r74
-// 0x000000b8: ldr d9, [sp, #48]
-// 0x000000bc: .cfi_restore_extended: r73
-// 0x000000bc: ldr d8, [sp, #40]
-// 0x000000c0: .cfi_restore_extended: r72
-// 0x000000c0: add sp, sp, #0xc0 (192)
-// 0x000000c4: .cfi_def_cfa_offset: 0
-// 0x000000c4: ret
-// 0x000000c8: .cfi_restore_state
-// 0x000000c8: .cfi_def_cfa_offset: 192
+// 0x00000004: stp x19, x20, [sp, #96]
+// 0x00000008: .cfi_offset: r19 at cfa-96
+// 0x00000008: .cfi_offset: r20 at cfa-88
+// 0x00000008: stp x21, x22, [sp, #112]
+// 0x0000000c: .cfi_offset: r21 at cfa-80
+// 0x0000000c: .cfi_offset: r22 at cfa-72
+// 0x0000000c: stp x23, x24, [sp, #128]
+// 0x00000010: .cfi_offset: r23 at cfa-64
+// 0x00000010: .cfi_offset: r24 at cfa-56
+// 0x00000010: stp x25, x26, [sp, #144]
+// 0x00000014: .cfi_offset: r25 at cfa-48
+// 0x00000014: .cfi_offset: r26 at cfa-40
+// 0x00000014: stp x27, x28, [sp, #160]
+// 0x00000018: .cfi_offset: r27 at cfa-32
+// 0x00000018: .cfi_offset: r28 at cfa-24
+// 0x00000018: stp x29, lr, [sp, #176]
+// 0x0000001c: .cfi_offset: r29 at cfa-16
+// 0x0000001c: .cfi_offset: r30 at cfa-8
+// 0x0000001c: stp d8, d9, [sp, #32]
+// 0x00000020: .cfi_offset_extended: r72 at cfa-160
+// 0x00000020: .cfi_offset_extended: r73 at cfa-152
+// 0x00000020: stp d10, d11, [sp, #48]
+// 0x00000024: .cfi_offset_extended: r74 at cfa-144
+// 0x00000024: .cfi_offset_extended: r75 at cfa-136
+// 0x00000024: stp d12, d13, [sp, #64]
+// 0x00000028: .cfi_offset_extended: r76 at cfa-128
+// 0x00000028: .cfi_offset_extended: r77 at cfa-120
+// 0x00000028: stp d14, d15, [sp, #80]
+// 0x0000002c: .cfi_offset_extended: r78 at cfa-112
+// 0x0000002c: .cfi_offset_extended: r79 at cfa-104
+// 0x0000002c: mov x21, tr
+// 0x00000030: str w0, [sp]
+// 0x00000034: str w1, [sp, #196]
+// 0x00000038: str s0, [sp, #200]
+// 0x0000003c: str w2, [sp, #204]
+// 0x00000040: str w3, [sp, #208]
+// 0x00000044: sub sp, sp, #0x20 (32)
+// 0x00000048: .cfi_def_cfa_offset: 224
+// 0x00000048: add sp, sp, #0x20 (32)
+// 0x0000004c: .cfi_def_cfa_offset: 192
+// 0x0000004c: mov tr, x21
+// 0x00000050: .cfi_remember_state
+// 0x00000050: ldp x19, x20, [sp, #96]
+// 0x00000054: .cfi_restore: r19
+// 0x00000054: .cfi_restore: r20
+// 0x00000054: ldp x21, x22, [sp, #112]
+// 0x00000058: .cfi_restore: r21
+// 0x00000058: .cfi_restore: r22
+// 0x00000058: ldp x23, x24, [sp, #128]
+// 0x0000005c: .cfi_restore: r23
+// 0x0000005c: .cfi_restore: r24
+// 0x0000005c: ldp x25, x26, [sp, #144]
+// 0x00000060: .cfi_restore: r25
+// 0x00000060: .cfi_restore: r26
+// 0x00000060: ldp x27, x28, [sp, #160]
+// 0x00000064: .cfi_restore: r27
+// 0x00000064: .cfi_restore: r28
+// 0x00000064: ldp x29, lr, [sp, #176]
+// 0x00000068: .cfi_restore: r29
+// 0x00000068: .cfi_restore: r30
+// 0x00000068: ldp d8, d9, [sp, #32]
+// 0x0000006c: .cfi_restore_extended: r72
+// 0x0000006c: .cfi_restore_extended: r73
+// 0x0000006c: ldp d10, d11, [sp, #48]
+// 0x00000070: .cfi_restore_extended: r74
+// 0x00000070: .cfi_restore_extended: r75
+// 0x00000070: ldp d12, d13, [sp, #64]
+// 0x00000074: .cfi_restore_extended: r76
+// 0x00000074: .cfi_restore_extended: r77
+// 0x00000074: ldp d14, d15, [sp, #80]
+// 0x00000078: .cfi_restore_extended: r78
+// 0x00000078: .cfi_restore_extended: r79
+// 0x00000078: add sp, sp, #0xc0 (192)
+// 0x0000007c: .cfi_def_cfa_offset: 0
+// 0x0000007c: ret
+// 0x00000080: .cfi_restore_state
+// 0x00000080: .cfi_def_cfa_offset: 192
 
 static constexpr uint8_t expected_asm_kX86[] = {
     0x57, 0x56, 0x55, 0x83, 0xC4, 0xE4, 0x50, 0x89, 0x4C, 0x24, 0x34, 0xF3,
diff --git a/compiler/jni/quick/arm64/calling_convention_arm64.cc b/compiler/jni/quick/arm64/calling_convention_arm64.cc
index 05eb80a..a6caff1 100644
--- a/compiler/jni/quick/arm64/calling_convention_arm64.cc
+++ b/compiler/jni/quick/arm64/calling_convention_arm64.cc
@@ -157,27 +157,25 @@ const ManagedRegisterEntrySpills& Arm64ManagedRuntimeCallingConvention::EntrySpi
 Arm64JniCallingConvention::Arm64JniCallingConvention(bool is_static, bool is_synchronized,
                                                      const char* shorty)
     : JniCallingConvention(is_static, is_synchronized, shorty, kFramePointerSize) {
-  // TODO: Ugly hard code...
-  // Should generate these according to the spill mask automatically.
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X20));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X21));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X22));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X23));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X24));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X25));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X26));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X27));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X28));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X29));
-  callee_save_regs_.push_back(Arm64ManagedRegister::FromXRegister(X30));
+  uint32_t core_spill_mask = CoreSpillMask();
+  for (int x_reg = 0; x_reg < kNumberOfXRegisters; ++x_reg) {
+    if (((1 << x_reg) & core_spill_mask) != 0) {
+      callee_save_regs_.push_back(
+          Arm64ManagedRegister::FromXRegister(static_cast<XRegister>(x_reg)));
+    }
+  }
 
-  for (size_t i = 0; i < arraysize(kDCalleeSaveRegisters); ++i) {
-    callee_save_regs_.push_back(Arm64ManagedRegister::FromDRegister(kDCalleeSaveRegisters[i]));
+  uint32_t fp_spill_mask = FpSpillMask();
+  for (int d_reg = 0; d_reg < kNumberOfDRegisters; ++d_reg) {
+    if (((1 << d_reg) & fp_spill_mask) != 0) {
+      callee_save_regs_.push_back(
+          Arm64ManagedRegister::FromDRegister(static_cast<DRegister>(d_reg)));
+    }
   }
 }
 
 uint32_t Arm64JniCallingConvention::CoreSpillMask() const {
-  // Compute spill mask to agree with callee saves initialized in the constructor
+  // Compute spill mask to agree with callee saves initialized in the constructor.
   // Note: The native jni function may call to some VM runtime functions which may suspend
   // or trigger GC. And the jni method frame will become top quick frame in those cases.
   // So we need to satisfy GC to save LR and callee-save registers which is similar to
@@ -186,12 +184,14 @@ uint32_t Arm64JniCallingConvention::CoreSpillMask() const {
   // Jni method is the method that compiled by jni compiler.
   // Call chain: managed code(java) --> jni method --> jni function.
   // Thread register(X18, scratched by aapcs64) is not saved on stack, it is saved in ETR(X21).
-  // Suspend register(x19) is preserved by aapcs64 and it is not used in Jni method.
-  return 1 << X20 | 1 << X21 | 1 << X22 | 1 << X23 | 1 << X24 | 1 << X25 |
-         1 << X26 | 1 << X27 | 1 << X28 | 1 << X29 | 1 << LR;
+  return 1 << X19 | 1 << X20 | 1 << X21 | 1 << X22 | 1 << X23 | 1 << X24 |
+         1 << X25 | 1 << X26 | 1 << X27 | 1 << X28 | 1 << X29 | 1 << LR;
 }
 
 uint32_t Arm64JniCallingConvention::FpSpillMask() const {
+  // Considering the case, java_method_1 --> jni method --> jni function --> java_method_2, we may
+  // break on java_method_2 and we still need to find out the values of DEX registers in
+  // java_method_1. So all callee-saves(in managed code) need to be saved.
   uint32_t result = 0;
   for (size_t i = 0; i < arraysize(kDCalleeSaveRegisters); ++i) {
     result |= (1 << kDCalleeSaveRegisters[i]);