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author | Roland Levillain <rpl@google.com> | 2015-04-29 11:12:33 +0000 |
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committer | Roland Levillain <rpl@google.com> | 2015-04-29 11:12:33 +0000 |
commit | 2a7a1d7808f003bea908023ebd11eb442d2fca39 (patch) | |
tree | 9a74fcc5590e9f39c0019edff70cd89139fcd890 /compiler/utils | |
parent | 9b95a057ee20e4b1ca2e9c663726482172dc9ba3 (diff) | |
download | art-2a7a1d7808f003bea908023ebd11eb442d2fca39.zip art-2a7a1d7808f003bea908023ebd11eb442d2fca39.tar.gz art-2a7a1d7808f003bea908023ebd11eb442d2fca39.tar.bz2 |
Revert "Revert "Revert "[optimizing] Improve x86 shifts"""
This reverts commit 9b95a057ee20e4b1ca2e9c663726482172dc9ba3.
Reverting this CL as it breaks libcore tests:
org.apache.harmony.tests.java.lang.DoubleTest#test_compare
junit.framework.AssertionFailedError: compare() -0.0 should be less 0.0
at junit.framework.Assert.assertTrue(Assert.java:140)
at org.apache.harmony.tests.java.lang.DoubleTest.test_compare(DoubleTest.java:258)
org.apache.harmony.tests.java.lang.DoubleTest#test_compare FAIL (EXEC_FAILED)
org.apache.harmony.tests.java.lang.DoubleTest#test_compareToLjava_lang_Double
junit.framework.AssertionFailedError: Assert 2: compare() -0.0 should be less 0.0
at junit.framework.Assert.assertTrue(Assert.java:140)
at org.apache.harmony.tests.java.lang.DoubleTest.test_compareToLjava_lang_Double(DoubleTest.java:1320)
org.apache.harmony.tests.java.lang.DoubleTest#test_compareToLjava_lang_Double FAIL (EXEC_FAILED)
Change-Id: I10f0ec8cc9495cc225fef1940b3f1a9fe87d996f
Diffstat (limited to 'compiler/utils')
-rw-r--r-- | compiler/utils/x86/assembler_x86.cc | 70 | ||||
-rw-r--r-- | compiler/utils/x86/assembler_x86.h | 12 |
2 files changed, 13 insertions, 69 deletions
diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc index f2541a2..329698c 100644 --- a/compiler/utils/x86/assembler_x86.cc +++ b/compiler/utils/x86/assembler_x86.cc @@ -1292,62 +1292,32 @@ void X86Assembler::decl(const Address& address) { void X86Assembler::shll(Register reg, const Immediate& imm) { - EmitGenericShift(4, Operand(reg), imm); + EmitGenericShift(4, reg, imm); } void X86Assembler::shll(Register operand, Register shifter) { - EmitGenericShift(4, Operand(operand), shifter); -} - - -void X86Assembler::shll(const Address& address, const Immediate& imm) { - EmitGenericShift(4, address, imm); -} - - -void X86Assembler::shll(const Address& address, Register shifter) { - EmitGenericShift(4, address, shifter); + EmitGenericShift(4, operand, shifter); } void X86Assembler::shrl(Register reg, const Immediate& imm) { - EmitGenericShift(5, Operand(reg), imm); + EmitGenericShift(5, reg, imm); } void X86Assembler::shrl(Register operand, Register shifter) { - EmitGenericShift(5, Operand(operand), shifter); -} - - -void X86Assembler::shrl(const Address& address, const Immediate& imm) { - EmitGenericShift(5, address, imm); -} - - -void X86Assembler::shrl(const Address& address, Register shifter) { - EmitGenericShift(5, address, shifter); + EmitGenericShift(5, operand, shifter); } void X86Assembler::sarl(Register reg, const Immediate& imm) { - EmitGenericShift(7, Operand(reg), imm); + EmitGenericShift(7, reg, imm); } void X86Assembler::sarl(Register operand, Register shifter) { - EmitGenericShift(7, Operand(operand), shifter); -} - - -void X86Assembler::sarl(const Address& address, const Immediate& imm) { - EmitGenericShift(7, address, imm); -} - - -void X86Assembler::sarl(const Address& address, Register shifter) { - EmitGenericShift(7, address, shifter); + EmitGenericShift(7, operand, shifter); } @@ -1360,15 +1330,6 @@ void X86Assembler::shld(Register dst, Register src, Register shifter) { } -void X86Assembler::shld(Register dst, Register src, const Immediate& imm) { - AssemblerBuffer::EnsureCapacity ensured(&buffer_); - EmitUint8(0x0F); - EmitUint8(0xA4); - EmitRegisterOperand(src, dst); - EmitUint8(imm.value() & 0xFF); -} - - void X86Assembler::shrd(Register dst, Register src, Register shifter) { DCHECK_EQ(ECX, shifter); AssemblerBuffer::EnsureCapacity ensured(&buffer_); @@ -1378,15 +1339,6 @@ void X86Assembler::shrd(Register dst, Register src, Register shifter) { } -void X86Assembler::shrd(Register dst, Register src, const Immediate& imm) { - AssemblerBuffer::EnsureCapacity ensured(&buffer_); - EmitUint8(0x0F); - EmitUint8(0xAC); - EmitRegisterOperand(src, dst); - EmitUint8(imm.value() & 0xFF); -} - - void X86Assembler::negl(Register reg) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitUint8(0xF7); @@ -1670,28 +1622,28 @@ void X86Assembler::EmitLabelLink(Label* label) { void X86Assembler::EmitGenericShift(int reg_or_opcode, - const Operand& operand, + Register reg, const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); CHECK(imm.is_int8()); if (imm.value() == 1) { EmitUint8(0xD1); - EmitOperand(reg_or_opcode, operand); + EmitOperand(reg_or_opcode, Operand(reg)); } else { EmitUint8(0xC1); - EmitOperand(reg_or_opcode, operand); + EmitOperand(reg_or_opcode, Operand(reg)); EmitUint8(imm.value() & 0xFF); } } void X86Assembler::EmitGenericShift(int reg_or_opcode, - const Operand& operand, + Register operand, Register shifter) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); CHECK_EQ(shifter, ECX); EmitUint8(0xD3); - EmitOperand(reg_or_opcode, operand); + EmitOperand(reg_or_opcode, Operand(operand)); } static dwarf::Reg DWARFReg(Register reg) { diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h index 946c96d..7fc8ef0 100644 --- a/compiler/utils/x86/assembler_x86.h +++ b/compiler/utils/x86/assembler_x86.h @@ -430,20 +430,12 @@ class X86Assembler FINAL : public Assembler { void shll(Register reg, const Immediate& imm); void shll(Register operand, Register shifter); - void shll(const Address& address, const Immediate& imm); - void shll(const Address& address, Register shifter); void shrl(Register reg, const Immediate& imm); void shrl(Register operand, Register shifter); - void shrl(const Address& address, const Immediate& imm); - void shrl(const Address& address, Register shifter); void sarl(Register reg, const Immediate& imm); void sarl(Register operand, Register shifter); - void sarl(const Address& address, const Immediate& imm); - void sarl(const Address& address, Register shifter); void shld(Register dst, Register src, Register shifter); - void shld(Register dst, Register src, const Immediate& imm); void shrd(Register dst, Register src, Register shifter); - void shrd(Register dst, Register src, const Immediate& imm); void negl(Register reg); void notl(Register reg); @@ -628,8 +620,8 @@ class X86Assembler FINAL : public Assembler { void EmitLabelLink(Label* label); void EmitNearLabelLink(Label* label); - void EmitGenericShift(int rm, const Operand& operand, const Immediate& imm); - void EmitGenericShift(int rm, const Operand& operand, Register shifter); + void EmitGenericShift(int rm, Register reg, const Immediate& imm); + void EmitGenericShift(int rm, Register operand, Register shifter); DISALLOW_COPY_AND_ASSIGN(X86Assembler); }; |