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author | Nicolas Geoffray <ngeoffray@google.com> | 2014-07-17 15:15:34 +0100 |
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committer | Nicolas Geoffray <ngeoffray@google.com> | 2014-07-21 10:39:33 +0100 |
commit | 1a43dd78d054dbad8d7af9ba4829ea2f1cb70b53 (patch) | |
tree | 9460255e0afe00e2976a8d0485d8fc5e3219c6fd /compiler/utils | |
parent | b5a214105d4c9b6c14de1649764950dd35bd620f (diff) | |
download | art-1a43dd78d054dbad8d7af9ba4829ea2f1cb70b53.zip art-1a43dd78d054dbad8d7af9ba4829ea2f1cb70b53.tar.gz art-1a43dd78d054dbad8d7af9ba4829ea2f1cb70b53.tar.bz2 |
Add write barriers to optimizing compiler.
Change-Id: I43a40954757f51d49782e70bc28f7c314d6dbe17
Diffstat (limited to 'compiler/utils')
-rw-r--r-- | compiler/utils/arm/assembler_thumb2.cc | 26 | ||||
-rw-r--r-- | compiler/utils/x86_64/assembler_x86_64.cc | 25 | ||||
-rw-r--r-- | compiler/utils/x86_64/assembler_x86_64.h | 4 |
3 files changed, 43 insertions, 12 deletions
diff --git a/compiler/utils/arm/assembler_thumb2.cc b/compiler/utils/arm/assembler_thumb2.cc index c693ec0..78ff31a 100644 --- a/compiler/utils/arm/assembler_thumb2.cc +++ b/compiler/utils/arm/assembler_thumb2.cc @@ -1376,13 +1376,23 @@ void Thumb2Assembler::EmitLoadStore(Condition cond, } if (must_be_32bit) { - int32_t encoding = 0x1f << 27 | B22 | (load ? B20 : 0) | static_cast<uint32_t>(rd) << 12 | + int32_t encoding = 0x1f << 27 | (load ? B20 : 0) | static_cast<uint32_t>(rd) << 12 | ad.encodingThumb(true); + if (half) { + encoding |= B21; + } else if (!byte) { + encoding |= B22; + } Emit32(encoding); } else { // 16 bit register offset. int32_t encoding = B14 | B12 | (load ? B11 : 0) | static_cast<uint32_t>(rd) | ad.encodingThumb(false); + if (byte) { + encoding |= B10; + } else if (half) { + encoding |= B9; + } Emit16(encoding); } } @@ -2513,12 +2523,22 @@ void Thumb2Assembler::MemoryBarrier(ManagedRegister mscratch) { void Thumb2Assembler::CompareAndBranchIfZero(Register r, Label* label) { - cbz(r, label); + if (force_32bit_branches_) { + cmp(r, ShifterOperand(0)); + b(label, EQ); + } else { + cbz(r, label); + } } void Thumb2Assembler::CompareAndBranchIfNonZero(Register r, Label* label) { - cbnz(r, label); + if (force_32bit_branches_) { + cmp(r, ShifterOperand(0)); + b(label, NE); + } else { + cbnz(r, label); + } } } // namespace arm } // namespace art diff --git a/compiler/utils/x86_64/assembler_x86_64.cc b/compiler/utils/x86_64/assembler_x86_64.cc index fe9349b..1dbef95 100644 --- a/compiler/utils/x86_64/assembler_x86_64.cc +++ b/compiler/utils/x86_64/assembler_x86_64.cc @@ -1233,7 +1233,7 @@ void X86_64Assembler::mull(const Address& address) { void X86_64Assembler::shll(CpuRegister reg, const Immediate& imm) { - EmitGenericShift(4, reg, imm); + EmitGenericShift(false, 4, reg, imm); } @@ -1243,7 +1243,12 @@ void X86_64Assembler::shll(CpuRegister operand, CpuRegister shifter) { void X86_64Assembler::shrl(CpuRegister reg, const Immediate& imm) { - EmitGenericShift(5, reg, imm); + EmitGenericShift(false, 5, reg, imm); +} + + +void X86_64Assembler::shrq(CpuRegister reg, const Immediate& imm) { + EmitGenericShift(true, 5, reg, imm); } @@ -1253,7 +1258,7 @@ void X86_64Assembler::shrl(CpuRegister operand, CpuRegister shifter) { void X86_64Assembler::sarl(CpuRegister reg, const Immediate& imm) { - EmitGenericShift(7, reg, imm); + EmitGenericShift(false, 7, reg, imm); } @@ -1569,11 +1574,15 @@ void X86_64Assembler::EmitLabelLink(Label* label) { } -void X86_64Assembler::EmitGenericShift(int reg_or_opcode, - CpuRegister reg, - const Immediate& imm) { +void X86_64Assembler::EmitGenericShift(bool wide, + int reg_or_opcode, + CpuRegister reg, + const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); CHECK(imm.is_int8()); + if (wide) { + EmitRex64(reg); + } if (imm.value() == 1) { EmitUint8(0xD1); EmitOperand(reg_or_opcode, Operand(reg)); @@ -1586,8 +1595,8 @@ void X86_64Assembler::EmitGenericShift(int reg_or_opcode, void X86_64Assembler::EmitGenericShift(int reg_or_opcode, - CpuRegister operand, - CpuRegister shifter) { + CpuRegister operand, + CpuRegister shifter) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); CHECK_EQ(shifter.AsRegister(), RCX); EmitUint8(0xD3); diff --git a/compiler/utils/x86_64/assembler_x86_64.h b/compiler/utils/x86_64/assembler_x86_64.h index 330d2d5..e988029 100644 --- a/compiler/utils/x86_64/assembler_x86_64.h +++ b/compiler/utils/x86_64/assembler_x86_64.h @@ -441,6 +441,8 @@ class X86_64Assembler FINAL : public Assembler { void sarl(CpuRegister reg, const Immediate& imm); void sarl(CpuRegister operand, CpuRegister shifter); + void shrq(CpuRegister reg, const Immediate& imm); + void negl(CpuRegister reg); void notl(CpuRegister reg); @@ -626,7 +628,7 @@ class X86_64Assembler FINAL : public Assembler { void EmitLabelLink(Label* label); void EmitNearLabelLink(Label* label); - void EmitGenericShift(int rm, CpuRegister reg, const Immediate& imm); + void EmitGenericShift(bool wide, int rm, CpuRegister reg, const Immediate& imm); void EmitGenericShift(int rm, CpuRegister operand, CpuRegister shifter); // If any input is not false, output the necessary rex prefix. |