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| author | Nicolas Geoffray <ngeoffray@google.com> | 2014-12-08 18:00:55 +0000 |
|---|---|---|
| committer | Nicolas Geoffray <ngeoffray@google.com> | 2014-12-09 10:18:04 +0000 |
| commit | 486cc19e1e2eca4231f760117e95090c03e2d8c6 (patch) | |
| tree | d9d21691ea0e019c0940d6c72b8593c75d810662 /compiler | |
| parent | 6c964c98400b8c0949d5e369968da2d4809b772f (diff) | |
| download | art-486cc19e1e2eca4231f760117e95090c03e2d8c6.zip art-486cc19e1e2eca4231f760117e95090c03e2d8c6.tar.gz art-486cc19e1e2eca4231f760117e95090c03e2d8c6.tar.bz2 | |
Explicitly mask constants in shift operations.
The assemblers expect an int8, so we mask ahead of calling them.
Change-Id: Id668cda6853fa365ac02531bf7aae288cad20fcd
Diffstat (limited to 'compiler')
| -rw-r--r-- | compiler/optimizing/code_generator_x86.cc | 2 | ||||
| -rw-r--r-- | compiler/optimizing/code_generator_x86_64.cc | 4 |
2 files changed, 3 insertions, 3 deletions
diff --git a/compiler/optimizing/code_generator_x86.cc b/compiler/optimizing/code_generator_x86.cc index 8a0c2de..4757235 100644 --- a/compiler/optimizing/code_generator_x86.cc +++ b/compiler/optimizing/code_generator_x86.cc @@ -2391,7 +2391,7 @@ void InstructionCodeGeneratorX86::HandleShift(HBinaryOperation* op) { __ shrl(first_reg, second_reg); } } else { - Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); + Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue); if (op->IsShl()) { __ shll(first_reg, imm); } else if (op->IsShr()) { diff --git a/compiler/optimizing/code_generator_x86_64.cc b/compiler/optimizing/code_generator_x86_64.cc index 233f4a4..f8651f6 100644 --- a/compiler/optimizing/code_generator_x86_64.cc +++ b/compiler/optimizing/code_generator_x86_64.cc @@ -2223,7 +2223,7 @@ void InstructionCodeGeneratorX86_64::HandleShift(HBinaryOperation* op) { __ shrl(first_reg, second_reg); } } else { - Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); + Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue); if (op->IsShl()) { __ shll(first_reg, imm); } else if (op->IsShr()) { @@ -2245,7 +2245,7 @@ void InstructionCodeGeneratorX86_64::HandleShift(HBinaryOperation* op) { __ shrq(first_reg, second_reg); } } else { - Immediate imm(second.GetConstant()->AsIntConstant()->GetValue()); + Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftValue); if (op->IsShl()) { __ shlq(first_reg, imm); } else if (op->IsShr()) { |