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| author | Serguei Katkov <serguei.i.katkov@intel.com> | 2014-09-08 12:42:27 +0700 |
|---|---|---|
| committer | Serguei Katkov <serguei.i.katkov@intel.com> | 2014-09-09 13:01:22 +0700 |
| commit | a464466fea8df617a50055230cfe7a16ea52cc14 (patch) | |
| tree | 3ac5c8345c29b6945c3bcf0ce8db1ba1e8a7d937 /compiler | |
| parent | 9204ed5102ea7cd57bd3ff7bb44f3ea26e28ae2a (diff) | |
| download | art-a464466fea8df617a50055230cfe7a16ea52cc14.zip art-a464466fea8df617a50055230cfe7a16ea52cc14.tar.gz art-a464466fea8df617a50055230cfe7a16ea52cc14.tar.bz2 | |
x86: evaluation destination should be after load of source in RA
In almost most cases working with Register Allocator we must first
load source and then evaluate the destination. In this particular case
for byte-code shl-int/2addr v10, v10 we first find a destination (memory)
then load source (v10 -> physical register) and generate a shift operation
on memory. This is ok for this bytecode but RA thinks that v10 is in register
(we loaded source) and this is incorrect because updated value in memory
and physycal register is not up to date.
Change-Id: Ib4c71f70dcbf78b76ca89897e3bd605a89d77d08
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Diffstat (limited to 'compiler')
| -rwxr-xr-x | compiler/dex/quick/x86/int_x86.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/compiler/dex/quick/x86/int_x86.cc b/compiler/dex/quick/x86/int_x86.cc index 3ca85bf..2ec37cd 100755 --- a/compiler/dex/quick/x86/int_x86.cc +++ b/compiler/dex/quick/x86/int_x86.cc @@ -3031,8 +3031,8 @@ void X86Mir2Lir::GenArithOpInt(Instruction::Code opcode, RegLocation rl_dest, LoadValueDirectFixed(rl_rhs, t_reg); if (is_two_addr) { // Can we do this directly into memory? - rl_result = UpdateLocTyped(rl_dest, kCoreReg); rl_rhs = LoadValue(rl_rhs, kCoreReg); + rl_result = UpdateLocTyped(rl_dest, kCoreReg); if (rl_result.location != kLocPhysReg) { // Okay, we can do this into memory OpMemReg(op, rl_result, t_reg.GetReg()); |