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author | Bill Buzbee <buzbee@android.com> | 2014-05-27 18:08:40 +0000 |
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committer | Gerrit Code Review <noreply-gerritcodereview@google.com> | 2014-05-27 18:08:40 +0000 |
commit | ab5b370e44629332e73ffd66bfe8b8a924236c5c (patch) | |
tree | 18aa702dcb792498003399ecf2257853e42b43a4 /compiler | |
parent | bbc66c5855fa4f36b6f94311607f0119a93d809a (diff) | |
parent | 48241e786121e1c4c050d9cfad3d22de270a3e75 (diff) | |
download | art-ab5b370e44629332e73ffd66bfe8b8a924236c5c.zip art-ab5b370e44629332e73ffd66bfe8b8a924236c5c.tar.gz art-ab5b370e44629332e73ffd66bfe8b8a924236c5c.tar.bz2 |
Merge "AArch64: Add suspend check in managed code."
Diffstat (limited to 'compiler')
-rw-r--r-- | compiler/dex/frontend.cc | 2 | ||||
-rw-r--r-- | compiler/dex/quick/arm64/int_arm64.cc | 11 | ||||
-rw-r--r-- | compiler/dex/quick/arm64/target_arm64.cc | 6 |
3 files changed, 3 insertions, 16 deletions
diff --git a/compiler/dex/frontend.cc b/compiler/dex/frontend.cc index beebe62..c3f694d 100644 --- a/compiler/dex/frontend.cc +++ b/compiler/dex/frontend.cc @@ -692,7 +692,7 @@ int x86_64_support_list[] = { // S : short // C : char // I : int -// L : long +// J : long // F : float // D : double // L : reference(object, array) diff --git a/compiler/dex/quick/arm64/int_arm64.cc b/compiler/dex/quick/arm64/int_arm64.cc index 38f110e..8dad90a 100644 --- a/compiler/dex/quick/arm64/int_arm64.cc +++ b/compiler/dex/quick/arm64/int_arm64.cc @@ -725,17 +725,10 @@ void Arm64Mir2Lir::GenDivZeroCheckWide(RegStorage reg) { // Test suspend flag, return target of taken suspend branch LIR* Arm64Mir2Lir::OpTestSuspend(LIR* target) { - // TODO(Arm64): re-enable suspend checks, once art_quick_test_suspend is implemented and - // the suspend register is properly handled in the trampolines. -#if 0 + // FIXME: Define rA64_SUSPEND as w19, when we do not need two copies of reserved register. + // Note: The opcode is not set as wide, so actually we are using the 32-bit version register. NewLIR3(kA64Subs3rRd, rA64_SUSPEND, rA64_SUSPEND, 1); return OpCondBranch((target == NULL) ? kCondEq : kCondNe, target); -#else - // TODO(Arm64): Fake suspend check. Will always fail to branch. Remove this. - LIR* branch = NewLIR2((target == NULL) ? kA64Cbnz2rt : kA64Cbz2rt, rwzr, 0); - branch->target = target; - return branch; -#endif } // Decrement register and branch on condition diff --git a/compiler/dex/quick/arm64/target_arm64.cc b/compiler/dex/quick/arm64/target_arm64.cc index 808060d..0222447 100644 --- a/compiler/dex/quick/arm64/target_arm64.cc +++ b/compiler/dex/quick/arm64/target_arm64.cc @@ -630,12 +630,6 @@ void Arm64Mir2Lir::CompilerInitializeRegAlloc() { DCHECK_EQ(info->StorageMask(), 0x1U); } - // TODO: re-enable this when we can safely save r4 over the suspension code path. - bool no_suspend = NO_SUSPEND; // || !Runtime::Current()->ExplicitSuspendChecks(); - if (no_suspend) { - GetRegInfo(rs_rA64_SUSPEND)->MarkFree(); - } - // Don't start allocating temps at r0/s0/d0 or you may clobber return regs in early-exit methods. // TODO: adjust when we roll to hard float calling convention. reg_pool_->next_core_reg_ = 2; |