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authorSerguei Katkov <serguei.i.katkov@intel.com>2014-06-24 13:23:17 +0700
committerSerguei Katkov <serguei.i.katkov@intel.com>2014-07-09 12:10:52 +0700
commit94f3eb0c757d0a6a145e24ef95ef7d35c091bb01 (patch)
tree9f9c49f151d8065633d916921071adcb1bb1f087 /disassembler/disassembler_x86.cc
parent6e524ddc060f10a493dc63fa5b6dde0deef22219 (diff)
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x86_64: Clean-up after cmp-long fix
The patch adresses the coments from review done by Ian Rogers. Clean-up of assembler. Change-Id: I9dbb350dfc6645f8a63d624b2b785233529459a9 Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Diffstat (limited to 'disassembler/disassembler_x86.cc')
-rw-r--r--disassembler/disassembler_x86.cc10
1 files changed, 6 insertions, 4 deletions
diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc
index e6cbf05..61d5c81 100644
--- a/disassembler/disassembler_x86.cc
+++ b/disassembler/disassembler_x86.cc
@@ -201,7 +201,8 @@ size_t DisassemblerX86::DumpInstruction(std::ostream& os, const uint8_t* instr)
std::ostringstream opcode;
bool store = false; // stores to memory (ie rm is on the left)
bool load = false; // loads from memory (ie rm is on the right)
- bool byte_operand = false;
+ bool byte_operand = false; // true when the opcode is dealing with byte operands
+ bool byte_second_operand = false; // true when the source operand is a byte register but the target register isn't (ie movsxb/movzxb).
bool target_specific = false; // register name depends on target (64 vs 32 bits).
bool ax = false; // implicit use of ax
bool cx = false; // implicit use of cx
@@ -732,9 +733,9 @@ DISASSEMBLER_ENTRY(cmp,
break;
case 0xAF: opcode << "imul"; has_modrm = true; load = true; break;
case 0xB1: opcode << "cmpxchg"; has_modrm = true; store = true; break;
- case 0xB6: opcode << "movzxb"; has_modrm = true; load = true; break;
+ case 0xB6: opcode << "movzxb"; has_modrm = true; load = true; byte_second_operand = true; break;
case 0xB7: opcode << "movzxw"; has_modrm = true; load = true; break;
- case 0xBE: opcode << "movsxb"; has_modrm = true; load = true; break;
+ case 0xBE: opcode << "movsxb"; has_modrm = true; load = true; byte_second_operand = true; rex |= (rex == 0 ? 0 : 0b1000); break;
case 0xBF: opcode << "movsxw"; has_modrm = true; load = true; break;
case 0xC5:
if (prefix[2] == 0x66) {
@@ -1124,7 +1125,8 @@ DISASSEMBLER_ENTRY(cmp,
} else {
if (mod == 3) {
if (!no_ops) {
- DumpRmReg(address, rex_w, rm, byte_operand, prefix[2], load ? src_reg_file : dst_reg_file);
+ DumpRmReg(address, rex_w, rm, byte_operand || byte_second_operand,
+ prefix[2], load ? src_reg_file : dst_reg_file);
}
} else {
address << "[";