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authorMark Mendell <mark.p.mendell@intel.com>2015-03-31 22:16:59 -0400
committerMark Mendell <mark.p.mendell@intel.com>2015-04-01 08:45:38 -0400
commitfb8d279bc011b31d0765dc7ca59afea324fd0d0c (patch)
tree01b21964ce0516bda835faa15b260ac290714fe0 /disassembler
parentdcff612c3a6e1427749771c4559f198fa480f709 (diff)
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[optimizing] Implement x86/x86_64 math intrinsics
Implement floor/ceil/round/RoundFloat on x86 and x86_64. Implement RoundDouble on x86_64. Add support for roundss and roundsd on both architectures. Support them in the disassembler as well. Add the instruction set features for x86, as the 'round' instruction is only supported if SSE4.1 is supported. Fix the tests to handle the addition of passing the instruction set features to x86 and x86_64. Add assembler tests for roundsd and roundss to x86_64 assembler tests. Change-Id: I9742d5930befb0bbc23f3d6c83ce0183ed9fe04f Signed-off-by: Mark Mendell <mark.p.mendell@intel.com>
Diffstat (limited to 'disassembler')
-rw-r--r--disassembler/disassembler_x86.cc18
1 files changed, 18 insertions, 0 deletions
diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc
index 203488d..a1834e1 100644
--- a/disassembler/disassembler_x86.cc
+++ b/disassembler/disassembler_x86.cc
@@ -561,6 +561,24 @@ DISASSEMBLER_ENTRY(cmp,
instr++;
if (prefix[2] == 0x66) {
switch (*instr) {
+ case 0x0A:
+ opcode1 = "roundss";
+ prefix[2] = 0;
+ has_modrm = true;
+ store = true;
+ src_reg_file = SSE;
+ dst_reg_file = SSE;
+ immediate_bytes = 1;
+ break;
+ case 0x0B:
+ opcode1 = "roundsd";
+ prefix[2] = 0;
+ has_modrm = true;
+ store = true;
+ src_reg_file = SSE;
+ dst_reg_file = SSE;
+ immediate_bytes = 1;
+ break;
case 0x14:
opcode1 = "pextrb";
prefix[2] = 0;