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* Add a compilation tracing mechanism to the new compiler.Nicolas Geoffray2014-05-141-1/+1
| | | | | | Code mostly imported from: https://android-review.googlesource.com/#/c/81653/. Change-Id: I150fe942be0fb270e03fabb19032180f7a065d13
* Build live-in, live-out and kill sets for each block.Nicolas Geoffray2014-05-071-5/+5
| | | | | | | This information will be used when computing live ranges of instructions. Change-Id: I345ee833c1ccb4a8e725c7976453f6d58d350d74
* Make all registers available when allocating an output register.Nicolas Geoffray2014-05-021-0/+6
| | | | | | | On ARM we currently only have two register pairs available, so we need to use one already used for an input. Change-Id: I5411862310009a41e50ddab3549d3a9e9052266a
* Setup policies for register allocation.Nicolas Geoffray2014-04-291-2/+98
| | | | Change-Id: I857e77530fca3e2fb872fc142a916af1b48400dc
* Add a Transform to SSA phase to the optimizing compiler.Nicolas Geoffray2014-04-281-2/+2
| | | | Change-Id: Ia9700756a0396d797a00b529896487d52c989329
* Test control flow instruction with optimizing compiler.Nicolas Geoffray2014-04-081-21/+2
| | | | | | Add support for basic instructions to implement these tests. Change-Id: I3870bf9301599043b3511522bb49dc6364c9b4c0
* Add support for taking parameters in optimizing compiler.Nicolas Geoffray2014-04-071-8/+5
| | | | | | | - Fix stack layout to mimic Quick's. - Implement some sub operations. Change-Id: I8cf75a4d29b662381a64f02c0bc61d859482fc4e
* Use target-specific word instead of runtime word.Nicolas Geoffray2014-04-041-1/+1
| | | | Change-Id: Ia11dc3cc520a1a5c7bd017013e5699af9570ce91
* Merge "Support passing arguments to invoke-static* instructions."Nicolas Geoffray2014-04-031-7/+4
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| * Support passing arguments to invoke-static* instructions.Nicolas Geoffray2014-04-031-7/+4
| | | | | | | | | | | | | | | | | | - Stop using the frame pointer for accessing locals. - Stop emulating a stack when doing code generation. Instead, rely on dex register model, where instructions only reference registers. Change-Id: Id51bd7d33ac430cb87a53c9f4b0c864eeb1006f9
* | art: Handle x86_64 architecture equal to x86Dmitry Petrochenko2014-04-031-0/+3
|/ | | | | | | | This patch forces FE/ME to treat x86_64 as x86 exactly. The x86_64 logic will be revised later when assembly will be ready. Change-Id: I4a92477a6eeaa9a11fd710d35c602d8d6f88cbb6 Signed-off-by: Dmitry Petrochenko <dmitry.petrochenko@intel.com>
* Add support for invoke-static in optimizing compiler.Nicolas Geoffray2014-03-311-1/+91
| | | | | | | Support is limited to calls without parameters and returning void. For simplicity, we currently follow the Quick ABI. Change-Id: I54805161141b7eac5959f1cae0dc138dd0b2e8a5
* Run Java tests with the optimizing compiler.Nicolas Geoffray2014-03-191-0/+14
| | | | | | | Also fix a vector.reserve -> vector.resize braino, and build a GC map that dex2oat expects. Change-Id: I6acf2f90a4c32f90b79bf7709bf2e43931b98757
* Plug new optimizing compiler in compilation pipeline.Nicolas Geoffray2014-03-181-29/+24
| | | | | | Also rename accessors to ART's conventions. Change-Id: I344807055b98aa4b27215704ec362191464acecc
* More code generation for the optimizing compiler.Nicolas Geoffray2014-03-131-6/+45
| | | | | | | | | - Add HReturn instruction - Generate code for locals/if/return - Setup infrastructure for register allocation. Currently emulate a stack. Change-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb
* Add codegen support to the optimizing compiler.Nicolas Geoffray2014-03-041-0/+79
Change-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28
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