summaryrefslogtreecommitdiffstats
path: root/compiler/optimizing/code_generator_arm.h
Commit message (Collapse)AuthorAgeFilesLines
* Thumb2 assembler for JNI compiler and optimizing compilerDave Allison2014-06-051-2/+2
| | | | | | | | | | | | | | | | | | | | This provides a programmatic assembler for the thumb2 instruction set for ARM. The interface is the same as the ARM assembler and the ARM assembler has been moved into Arm32Assembler. The assembler handles most 16 and 32 bit instructions and also allows relocations due to branch expansion. It will also rewrite cbz/cbnz instructions if they go out of range. It also changes the JNI compiler to use the thumb2 assembler as opposed to forcing it to use ARM32. The trampoline compiler still uses ARM due to the way it returns the address of its generated code. A trampoline in thumb2 is the same size as that in ARM anyway (8 bytes). Provides gtest for testing the thumb2 instruction output. This gtest only runs on the host as it uses arm-eabi-objdump to disassemble the generated code. On the target the output is not checked but the assembler will still be run to perform all its checks. Change-Id: Icd9742b6f13541bec5b23097896727392e3a6fb6
* Add a linear scan register allocator to the optimizing compiler.Nicolas Geoffray2014-05-261-0/+11
| | | | | | | | | | | | This is a "by-the-book" implementation. It currently only deals with allocating registers, with no hint optimizations. The changes remaining to make it functional are: - Allocate spill slots. - Resolution and placements of Move instructions. - Connect it to the code generator. Change-Id: Ie0b2f6ba1b98da85425be721ce4afecd6b4012a4
* Setup policies for register allocation.Nicolas Geoffray2014-04-291-4/+7
| | | | Change-Id: I857e77530fca3e2fb872fc142a916af1b48400dc
* Code cleanup in preparation for x64 backend.Nicolas Geoffray2014-04-171-0/+32
| | | | | | | | | - Use InvokeDexCallingConventionVisitor for setting up HParameterValues - Use kVregSize instead of kX86WordSize when dealing with virtual registers. Change-Id: Ia520223010194c70a3ff0ed659077f55cec4e7d8
* Long support in optimizing compiler.Nicolas Geoffray2014-04-161-4/+12
| | | | | | | | | - Add stack locations to the Location class. - Change logic of parameter passing/setup by setting the location of such instructions the ones for the calling convention. Change-Id: I4730ad58732813dcb9c238f44f55dfc0baa18799
* Use target-specific word instead of runtime word.Nicolas Geoffray2014-04-041-4/+6
| | | | Change-Id: Ia11dc3cc520a1a5c7bd017013e5699af9570ce91
* Support passing arguments to invoke-static* instructions.Nicolas Geoffray2014-04-031-12/+10
| | | | | | | | | - Stop using the frame pointer for accessing locals. - Stop emulating a stack when doing code generation. Instead, rely on dex register model, where instructions only reference registers. Change-Id: Id51bd7d33ac430cb87a53c9f4b0c864eeb1006f9
* Add support for invoke-static in optimizing compiler.Nicolas Geoffray2014-03-311-0/+1
| | | | | | | Support is limited to calls without parameters and returning void. For simplicity, we currently follow the Quick ABI. Change-Id: I54805161141b7eac5959f1cae0dc138dd0b2e8a5
* Plug new optimizing compiler in compilation pipeline.Nicolas Geoffray2014-03-181-4/+34
| | | | | | Also rename accessors to ART's conventions. Change-Id: I344807055b98aa4b27215704ec362191464acecc
* More code generation for the optimizing compiler.Nicolas Geoffray2014-03-131-4/+28
| | | | | | | | | - Add HReturn instruction - Generate code for locals/if/return - Setup infrastructure for register allocation. Currently emulate a stack. Change-Id: Ib28c2dba80f6c526177ed9a7b09c0689ac8122fb
* Add codegen support to the optimizing compiler.Nicolas Geoffray2014-03-041-0/+54
Change-Id: I9aae76908ff1d6e64fb71a6718fc1426b67a5c28