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Change-Id: I88cbb329911ed489768772218b49b6f1756ffd86
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- Use three arrays for blocking regsters instead of
one and computing offsets in that array.]
- Don't pass blocked_registers_ to methods, just use the field.
Change-Id: Ib698564c31127c59b5a64c80f4262394b8394dc6
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Change-Id: I4e4ef3a2002fc59ebd9097087f150eaf3f2a7e08
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We now leave the assembler buffer management to VIXL.
Change-Id: Ieefe83cf5cf5e1ab8c924b0e7dc03af6a55053ae
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Don't do "if (ptr)". Use const. Use DISALLOW_COPY_AND_ASSIGN. Avoid public
member variables.
Move ValueObject to base and use in ELF builder.
Tidy VectorOutputStream to not use non-const reference arguments.
Change-Id: I2c727c3fc61769c3726de7cfb68b2d6eb4477e53
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Now the source of truth is the Location object that knows
which register (core, pair, fpu) it needs to refer to.
Change-Id: I62401343d7479ecfb24b5ed161ec7829cda5a0b1
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- Follows Quick conventions.
- Currently only works with baseline register allocator.
Change-Id: Ie4b8e298f4f5e1cd82364da83e4344d4fc3621a3
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Change-Id: I282eece0cd497431f207cec61852b4585ed3655c
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- Currently the pass just changes the uses of checks to the
actual values.
- Also optimize array access, now that inputs can be constants.
- And fix another bug in the register allocator reveiled by
this change.
Change-Id: I43be0dbde9330ee5c8f9d678de11361292d8bd98
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As references are 32-bit, we should use movl instead movq.
Change-Id: Iffefbb9d86d5f40375f73994fd481f9bd28499b2
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This adds the reference negate code in arm64 and x86_64 that's used by
the jni compiler.
Bug: 12687968
Bug: 8367515
Change-Id: I28a44bcead1ee613866645620b4eaf54fad6a3aa
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Fixes a miss-translation in the pedantic change.
Change-Id: Ibdce896bf3667e06f10d60f160803451096b08ba
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Remove extra semicolons.
Dollar signs in C++ identifiers are an extension.
Named variadic macros are an extension.
Binary literals are a C++14 feature.
Enum re-declarations are not allowed.
Overflow.
Change-Id: I7d16b2217b2ef2959ca69de84eaecc754517714a
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Store the linker patches with each CompiledMethod instead of
keeping them in CompilerDriver. Reorganize oat file creation
to apply the patches as we're writing the method code. Add
framework for platform-specific relative call patches in the
OatWriter. Implement relative call patches for ARM.
Change-Id: Ie2effb3d92b61ac8f356140eba09dc37d62290f8
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- Remove the ones added during graph build (they were added
for the baseline code generator).
- Emit them at loop back edges after phi moves, so that the test
can directly jump to the loop header.
- Fix x86 and x86_64 suspend check by using cmpw instead of cmpl.
Change-Id: I6fad5795a55705d86c9e1cb85bf5d63dadfafa2a
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Purge GrowableArray from Quick and Portable.
Remove GrowableArray<T>::Iterator.
Change-Id: I92157d3a6ea5975f295662809585b2dc15caa1c6
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Check if "bin/{as,objcopy,objdump}" exists in the tools dir we found in "prebuilts/gcc/linux-x86/arm/".
Now there's an empty tree in platform/prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.9,
causing assembler_thumb_test to fail.
Change-Id: If6ba4f778b79f95239aa85e54816ab168e7d8940
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Wire up valgrind gtests. Add valgrind-test-art-host, currently
only depending on valgrind-test-art-host-gtest32.
Fix an Alloc setting to allow running valgrind.
Refactor the fault handler to manage (and correctly release) the
handlers.
Fix minor failure-case leaks exposed by tests.
Failing tests:
The optimizing compiler is leaking non-arena-ed structures
(e.g., assembler buffers), as code generators are not destroyed.
The solution has been moved to a follow-up CL.
Note: All 64b tests are failing as we cannot allocate a heap.
Change-Id: I7f854cfd098d9f68107ce492363e7dba9a82b9fa
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Change-Id: Ie25de4fae56c6712539f04172c42e3eff57df7ca
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OAT files have source line information enough for ART runtime needs like
jump to/from interpreter and thread suspension. But this information
is not enough for finer grained source level debugging and low-level
profiling (VTune or perf).
This patch adds to OAT files two additional sections:
.debug_line - DWARF formatted Elf32 section with detailed source line
information (mapping from native PC to Java source lines).
In addition to the debugging symbols added using the dex2oat option
--include-debug-symbols, the source line information is added to
the section .debug_line.
The source line info can be read by many Elf reading tools like objdump,
readelf, dwarfdump, gdb, perf, VTune, ...
gdb can use this debug line information in x86. In 64-bit mode
the information can be used if the oat file is mapped in the lower
address space (address has higher 32 bits zeroed). Relocation works.
Testing:
1. art/test/run-test --host --gdb [--64] 001-HelloWorld
2. in gdb: break Main.java:19
3. in gdb: break Runtime.java:111
4. in gdb: run - stops at void java.lang.Runtime.<init>()
5. in gdb: backtrace - shows call stack down to main()
6. in gdb: continue - stops at void Main.main() (only in 32-bit mode)
7. in gdb: backtrace - shows call stack down to main()
8. objdump -W <oat-file> - addresses are from VMA range of .text
section reported by objdump -h <file>
9. dwarfdump -ka <oat-file> - no errors expected
Size of aosp-x86-eng boot.oat increased by 11% from 80.5Mb to 89.2Mb
with two sections added .debug_line (7.2Mb) and .rel.debug (1.5Mb).
Change-Id: Ib8828832686e49782a63d5529008ff4814ed9cda
Signed-off-by: Yevgeny Rouban <yevgeny.y.rouban@intel.com>
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This reduces the stack space reserved for overflow checks to 12K, split
into an 8K gap and a 4K protected region. GC needs over 8K when running
in a stack overflow situation.
Also prevents signal runaway by detecting a signal inside code that
resulted from a signal handler invokation. And adds a max signal count to
the SignalTest to prevent it running forever.
Also reduces the number of iterations for the InterfaceTest as this was
taking (almost) forever with the --trace option on run-test.
Bug: 15435566
Change-Id: Id4fd46f22d52d42a9eb431ca07948673e8fda694
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Don't leave fields uninitialized in the x86-64 utils assembler.
Bug: 16993295
Change-Id: I1d1b96f1d666660024116372de0014f1d19fd487
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Do not save temporaries in case we use a different encoding than
the host assembler.
Bug: 16505797
Change-Id: Iaa9edfe8bc84d7f809f5b403de902b92b0998431
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Now for host-side x86 & x86_64 ART, we are able to get complete stacktrace with even mixed C/C++ & Java stack frames.
Testing:
1. art/test/run-test --host --gdb [--64] --no-relocate 005
2. In gdb, run 'b art::Class_classForName' which is implementation of a Java native method, then 'r'
3. In gdb, run 'bt'. You should see stack frames down to main()
Change-Id: I2d17e9aa0f6d42d374b5362a15ea35a2fce96302
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The unix_file tests should remove files and directories when they
are done testing.
Bug: 16505797
Change-Id: Iff6856f64ee42ee9818b4ac23a6de3fe7eec6eae
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Change-Id: Ib630bc28e6d694ffbe4a4a71cc988e36d00f6633
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Change-Id: Ibceb03fd57adea09643aa77a9399be196fa14709
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Create ArenaAllocatorAdapter, similar to the existing
ScopedArenaAllocatorAdapter, for allocating memory for
standard containers via the ArenaAllocator. Add the ability
to specify allocation kind rather than just kArenaAllocSTL
to both adapters. Move the scoped arena allocator to the
scoped_arena_containers.h header file.
Define template aliases for containers using the new adapter
and change a few MIRGraph and Mir2Lir members to use them.
Change-Id: I9bbc50248e0fed81729497b848cb29bf68444268
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Filter out dead sregs in GVN. Reclaim memory after each LVN
in the GVN modification phase.
Bug: 16398693
Change-Id: I8c88c3009663754e1b66c0ef3f62c3b93276e385
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CalleeSaveMethod frame size changes :
SaveAll : 368 -> 176
RefOnly : 176 -> 96
RefsAndArgs : 304 -> 224
JNI register spill size changes :
160 -> 88
In the transition assembly, use registers following the rules:
1. x0-x7 as temp/argument registers.
2. IP0, IP1 as scratch registers.
3. After correct type of callee-save-frame has been setup, all registers
are scratch-able(probably except xSELF and xSUSPEND).
4. When restore callee-save-frame, IP0 and IP1 should be untouched.
5. From C to managed code, we assume all callee save register in AAPCS
will be restored by managed code except x19(SUSPEND).
In quick compiler:
1. Use IP0, IP1 as scratch register.
2. Use IP1 as hidden argument register(IP0 will be scratched by
trampoline.)
Change-Id: I05ed9d418b01b9e87218a7608536f57e7a286e4c
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Also fix a couple of assembler/disassembler issues.
Change-Id: I705c8572988c1a9c4df3172b304678529636d5f6
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Change-Id: I59e97448bf29778769b79b51ee4ea43f43493d96
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Change-Id: I5fe0014a2928772650bdb120a877eb9624bf7651
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Change-Id: I8501d02a9bc5f84a769a80d46d0ec5754c972e5d
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Change-Id: I43a40954757f51d49782e70bc28f7c314d6dbe17
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Change-Id: I5bcc35ab50d4457186effef5592a75d7f4e5b65f
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Change-Id: I7bbaad590d84db97acfa7f8c4d093bc40e64684a
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Change-Id: I2b058f4433504dc3299c06f5cb0b5ab12f34aa82
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This patch squashes the use of cmp + b to cbz.
Change-Id: I3d146a9921c471f08ba7304f1ca1b427d8e7dcf9
Signed-off-by: Serban Constantinescu <serban.constantinescu@arm.com>
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Patch introduces 4 register XMM12-15 available for promotion of
fp virtual registers.
Change-Id: I3f89ad07fc8ae98b70f550eada09be7b693ffb67
Signed-off-by: Serguei Katkov <serguei.i.katkov@intel.com>
Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
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Change-Id: I7fb6dfb761bc5cf9e5705682032855a0a70ca867
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The LDR/STR encoder in the thumb assembler had an off-by-one
error for limit checking for immediates. This resulted in an
assertion failure for things like 'ldr rx,[ry,#128]'
Bug: 15876206
Change-Id: Ic866212e2feae94e0bd4c753724898d84f5cb944
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