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* Fix for incorrect encode and parse of PEXTRW instructionnikolay serdjuk2015-04-291-0/+8
* Fix for incorrect parse of PEXTRW instructionnikolay serdjuk2015-04-071-1/+1
* [optimizing] Implement x86/x86_64 math intrinsicsMark Mendell2015-04-011-0/+18
* ART: Fix x86 disassemblerAndreas Gampe2015-01-271-10/+16
* Fix crash in x86 disassembler.Nicolas Geoffray2014-12-161-1/+1
* ART: Do not inline elf writer debug symbolsAndreas Gampe2014-12-151-2/+2
* ART: Break up x86 disassembler main functionAndreas Gampe2014-12-151-237/+274
* Tidy x86 disassemblerIan Rogers2014-11-071-24/+84
* Tidy logging code not using UNIMPLEMENTED.Ian Rogers2014-10-241-2/+2
* C++11 related clean-up of DISALLOW_..Ian Rogers2014-10-221-2/+3
* Tidy up logging.Ian Rogers2014-10-221-0/+1
* Enable -Wimplicit-fallthrough.Ian Rogers2014-10-091-1/+1
* ART: Fix some -Wpedantic errorsAndreas Gampe2014-09-291-5/+5
* Avoid printing absolute addresses in oatdumpBrian Carlstrom2014-09-161-3/+5
* ART: Vectorization opcode implementation fixesLupusoru, Razvan A2014-09-031-59/+34
* ART: Add non-temporal store supportJean Christophe Beyler2014-08-261-0/+1
* Implement inlined shift long for 32bitYixin Shou2014-08-141-0/+12
* ART: Correct disassembling of 64bit immediates on x86_64Vladimir Kostyukov2014-07-301-2/+2
* ART: Correct disassembling of regs from opcodesVladimir Kostyukov2014-07-091-3/+5
* Merge "X86 Backend support for vectorized float and byte 16x16 operations"Ian Rogers2014-07-081-3/+17
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| * X86 Backend support for vectorized float and byte 16x16 operationsUdayan Banerji2014-07-081-3/+17
* | x86_64: Clean-up after cmp-long fixSerguei Katkov2014-07-091-4/+6
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* Merge "ART: Add HADDPS/HADDPD/SHUFPS/SHUFPD instruction generation"Ian Rogers2014-07-071-0/+27
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| * ART: Add HADDPS/HADDPD/SHUFPS/SHUFPD instruction generationOlivier Come2014-06-251-0/+27
* | ART: FF-opcodes are target-specificVladimir Kostyukov2014-07-031-8/+15
* | Load 64 bit constant into GPR by single instruction for 64bit modeYixin Shou2014-07-021-2/+12
* | ART: FPU instructions support in disassemblerVladimir Kostyukov2014-07-011-5/+27
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* X86 Dis: Add missing mov byte; Add size suffixesMark Mendell2014-06-211-6/+32
* Add Move with Sign Extend Double to disassemblerMark Mendell2014-06-081-0/+11
* Fix X86 disassambler printing of XMM, MM registersMark Mendell2014-06-051-1/+1
* ART: x86_64 disassembler improvementsVladimir Kostyukov2014-06-041-21/+68
* Support disassembly of 16-bit immediatesMark Mendell2014-05-301-2/+7
* Implement all vector instructions for X86Mark Mendell2014-05-241-4/+193
* ART: Enables x86_64 disassemblyVladimir Kostyukov2014-04-251-7/+25
* ART: Fixes an issue with REX prefix for instructions with no ModRM byteVladimir Kostyukov2014-04-171-1/+1
* Allow mixing of thread offsets between 32 and 64bit architectures.Ian Rogers2014-04-011-2/+6
* Relaxed memory barriers for x86Razvan A Lupusoru2014-03-261-0/+6
* x86-64 disassembler support.Ian Rogers2014-03-141-10/+16
* Inline x86 String.indexOfMark Mendell2014-02-201-0/+4
* Support to generate inline long to FP bytecodes for x86Razvan A Lupusoru2014-02-111-0/+14
* Specializing x86 range argument copyingRazvan A Lupusoru2014-02-051-0/+36
* Merge "Improve x86 long multiply and shifts"Ian Rogers2014-01-281-0/+12
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| * Improve x86 long multiply and shiftsMark Mendell2014-01-241-0/+12
* | Reduce x86 sequence for GP pair to XMMRazvan A Lupusoru2014-01-241-0/+11
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* Improve x86 long divideMark Mendell2014-01-241-0/+3
* Add conditional move support to x86 and allow GenMinMax to use itRazvan A Lupusoru2014-01-081-0/+6
* Disassemble more x86 instructionsMark Mendell2013-12-121-0/+16
* Add missing x86 imul opcode to disassemblerMark Mendell2013-12-111-0/+1
* Unsafe.compareAndSwapLong() intrinsic for x86.Vladimir Marko2013-12-031-0/+7
* Add byte swap instructions for ARM and x86.Vladimir Marko2013-10-281-0/+4
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