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* Initialize pDeoptimize quick entry pointer for Mips.Douglas Leung2015-07-131-0/+4
| | | | | | | | | This fixes art test 449-checker-bce. (cherry picked from commit 2e8bf554574516e0e6a9b10ccd9f13bf56189795) Bug: 21555893 Change-Id: I9a87c430168ea35984289b0b4a417aa0c659b6d5
* Add implicit null pointer and stack overflow checks for Mips.Douglas Leung2015-07-031-10/+95
| | | | | | | (cherry picked from commit 22bb5a2ebc1e2724179faf4660b2735dcb185f21) Bug: 21555893 Change-Id: I2a995be128a5603d08753c14956dd8c8240ac63c
* [MIPS] Fix method tracing for mips64Lazar Trsic2015-06-101-1/+1
| | | | | | | | | | | | | | | | Reg $v0 is being clobbered on using SETUP_REFS_ONLY_CALLEE_SAVE_FRAME inside instrumentation_exit() trampoline, when falling through from instrumentation_entry(). To fix, use $t1 for ArtMethod* fetching inside SETUP_ macros. Also fix some unrelated comment errors. Bug: 21555893 (cherry picked from commit 84bc06e30ba12c3ff07e577c52b63b9df162af7e) Change-Id: I4ab169f75988c4f0d924416a30196f21c1a043a3
* Move mirror::ArtMethod to nativeMathieu Chartier2015-06-023-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Optimizing + quick tests are passing, devices boot. TODO: Test and fix bugs in mips64. Saves 16 bytes per most ArtMethod, 7.5MB reduction in system PSS. Some of the savings are from removal of virtual methods and direct methods object arrays. Bug: 19264997 (cherry picked from commit e401d146407d61eeb99f8d6176b2ac13c4df1e33) Change-Id: I622469a0cfa0e7082a2119f3d6a9491eb61e3f3d Fix some ArtMethod related bugs Added root visiting for runtime methods, not currently required since the GcRoots in these methods are null. Added missing GetInterfaceMethodIfProxy in GetMethodLine, fixes --trace run-tests 005, 044. Fixed optimizing compiler bug where we used a normal stack location instead of double on ARM64, this fixes the debuggable tests. TODO: Fix JDWP tests. Bug: 19264997 Change-Id: I7c55f69c61d1b45351fd0dc7185ffe5efad82bd3 ART: Fix casts for 64-bit pointers on 32-bit compiler. Bug: 19264997 Change-Id: Ief45cdd4bae5a43fc8bfdfa7cf744e2c57529457 Fix JDWP tests after ArtMethod change Fixes Throwable::GetStackDepth for exception event detection after internal stack trace representation change. Adds missing ArtMethod::GetInterfaceMethodIfProxy call in case of proxy method. Bug: 19264997 Change-Id: I363e293796848c3ec491c963813f62d868da44d2 Fix accidental IMT and root marking regression Was always using the conflict trampoline. Also included fix for regression in GC time caused by extra roots. Most of the regression was IMT. Fixed bug in DumpGcPerformanceInfo where we would get SIGABRT due to detached thread. EvaluateAndApplyChanges: From ~2500 -> ~1980 GC time: 8.2s -> 7.2s due to 1s less of MarkConcurrentRoots Bug: 19264997 Change-Id: I4333e80a8268c2ed1284f87f25b9f113d4f2c7e0 Fix bogus image test assert Previously we were comparing the size of the non moving space to size of the image file. Now we properly compare the size of the image space against the size of the image file. Bug: 19264997 Change-Id: I7359f1f73ae3df60c5147245935a24431c04808a [MIPS64] Fix art_quick_invoke_stub argument offsets. ArtMethod reference's size got bigger, so we need to move other args and leave enough space for ArtMethod* and 'this' pointer. This fixes mips64 boot. Bug: 19264997 Change-Id: I47198d5f39a4caab30b3b77479d5eedaad5006ab
* Merge "ART: Add Mips o32 callee-save registers to SaveAll frame" into mnc-devAndreas Gampe2015-05-293-27/+44
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| * ART: Add Mips o32 callee-save registers to SaveAll frameAndreas Gampe2015-05-283-27/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | The floating point registers f20-f31 are callee-save in the Mips ABI. While the managed code does not touch them, they need to be saved when throwing an exception, so that they will be correctly restored and not smashed. Bug: 21266656 (cherry picked from commit a4e0e67611f54180694e0807d6599c1132269b6c) Change-Id: Ia96d52ce7fb41bf604da1797ce4d7a703e292415
* | ART: Use kBadFprBase on mips64 and arm64.Vladimir Marko2015-05-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | Fix incorrect usage of kBadGprBase to avoid misleading and ambiguous data in crash investigations. Bug: 21266656 (cherry picked from commit 5b09ea0af468d9232cf725ac7f7e73c145892c5c) Change-Id: Ia4fc60a5d61471c7a6c8fd0545a897ace43d90be
* | ART: Clean up arm64 kNumberOfXRegisters usage.Vladimir Marko2015-05-262-28/+17
|/ | | | | | | | | | | | | | | | | | | | | Avoid undefined behavior for arm64 stemming from 1u << 32 in loops with upper bound kNumberOfXRegisters. Create iterators for enumerating bits in an integer either from high to low or from low to high and use them for <arch>Context::FillCalleeSaves() on all architectures. Refactor runtime/utils.{h,cc} by moving all bit-fiddling functions to runtime/base/bit_utils.{h,cc} (together with the new bit iterators) and all time-related functions to runtime/base/time_utils.{h,cc}. Improve test coverage and fix some corner cases for the bit-fiddling functions. Bug: 13925192 (cherry picked from commit 80afd02024d20e60b197d3adfbb43cc303cf29e0) Change-Id: I905257a21de90b5860ebe1e39563758f721eab82
* Insert a read barrier in the JNI bridge.Hiroshi Yamauchi2015-05-071-0/+3
| | | | | | Bug: 20720510 Bug: 12687968 Change-Id: Ia9edb614853bad45ec25d6e2142361a8bda1eccf
* ART: Fix MIPS entrypoint downcall macros.Vladimir Marko2015-04-281-17/+3
| | | | | | | Broken by not updating the MIPS assembly after rebase of https://android-review.googlesource.com/79174 Change-Id: I6258c254c0652e92357d306640c461d9523da227
* Replace String CharArray with internal uint16_t array.Jeff Hao2015-04-271-0/+24
| | | | | | | | | | | | Summary of high level changes: - Adds compiler inliner support to identify string init methods - Adds compiler support (quick & optimizing) with new invoke code path that calls method off the thread pointer - Adds thread entrypoints for all string init methods - Adds map to verifier to log when receiver of string init has been copied to other registers. used by compiler and interpreter Change-Id: I797b992a8feb566f9ad73060011ab6f51eb7ce01
* Remove ArtMethod* parameter from dex cache entry points.Vladimir Marko2015-04-241-7/+16
| | | | | | | | | | | | | | | | Load the ArtMethod* using an optimized stack walk instead. This reduces the size of the generated code. Three of the entry points are called only from a slow-path and the fourth (InitializeTypeAndVerifyAccess) is rare and already slow enough that the one or two extra loads (depending on whether we already have the ArtMethod* in a register) are insignificant. And as we're starting to use PC-relative addressing of the dex cache arrays (already done by Quick for the boot image), having the ArtMethod* in a register becomes less likely anyway. Change-Id: Ib19b9d204e355e13bf386662a8b158178bf8ad28
* Replace NULL with nullptrMathieu Chartier2015-04-223-10/+15
| | | | | | | Also fixed some lines that were too long, and a few other minor details. Change-Id: I6efba5fb6e03eb5d0a300fddb2a75bf8e2f175cb
* Fix 099-vmdebug and 802-deoptimization art tests for Mips.Douglas Leung2015-03-311-16/+15
| | | | | | | | | | | There are 2 bugs that are causing these 2 tests to fail the same way. The first one is we should be using $t9 for function calls so $gp can be calculated correctly. The second bug is there can't be a gap between the quick frame and the callee save frame, otherwise the WalkStack() function will get confused and crash. Bug: 19003184 Change-Id: I3c545ce18268deb73150fca2a7d7a798540f1cf2
* ART: Change the isa defaults for MipsDouglas Leung2015-03-201-27/+54
| | | | | | | | Select the correct cpu variant for ART and select the default features based on compile flags for when the variant is not defined. Change-Id: I13622db85446ed6fbb467a699d8d3e27833f6f88
* Fix generic JNI stubs to not discard the Java native frame.Nicolas Geoffray2015-03-031-5/+4
| | | | Change-Id: Ic856b442fdde5ce91673fc5856eb0dfc84c75d28
* [MIPS] Fix mips32 trampoline problem.Nikola Veljkovic2015-02-252-0/+144
| | | | | | | | | | | | Reserve argument slots (for $a0-$a3) on the stack in the InvokeTrampoline() function, for entrypoints that contain direct reference to native implementation. Called function may use this space to store $a0-$a3 regs. This fixes the Settings app crash on mips32, when navigating to: Settings->Apps->(swipe) On SD card. Change-Id: If53ce822fd3ef6ef9839c89b556f76fac0792190
* ART: Introduce NO_RETURN, Mark DoLongJump noreturnAndreas Gampe2015-02-232-2/+3
| | | | | | | Add NO_RETURN macro that adds C++11 noreturn attribute. Mark DoLongJump methods as noreturn. Change-Id: Ifde4318e370493237050d4c1349285a0382df23f
* Refactor register access from StackVisitorSebastien Hertz2015-01-262-36/+26
| | | | | | | | | | | | | | | | Moves register access checking up to StackVisitor by adding methods IsAccessibleGPR and IsAccessibleFPR in Context class. It allows to simplify GetGPR/FPR and SetGPR/FPR methods in the Context class (and its subclasses). Also simplifies code in StackVisitor by adding IsAccessibleRegister, GetRegister and SetRegister methods which then call either GPR or FPR specific methods in Context depending on the nature of the accessed register. Bug: 18547544 Bug: 19106446 Change-Id: I6e707608d935a71571d0e975a6e766053de3763a
* Merge "Fix refs_and_args callee save order for Mips32."Andreas Gampe2015-01-161-9/+9
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| * Fix refs_and_args callee save order for Mips32.Douglas Leung2015-01-121-9/+9
| | | | | | | | | | | | This patch fixes an ART crash while using the soft keyboard. Change-Id: Ib2d651c460ce2707356986cd733bed23b0cabb21
* | ART: Introduce Mips32 R6Andreas Gampe2015-01-132-29/+75
| | | | | | | | | | | | | | Add an instruction-set feature for Mips R6. Currently restricted to the interpreter. Change-Id: Ic6d888e135bc87340229a0543dd94d0c1e863edd
* | ART: Use jalr instead of jr for MipsAndreas Gampe2015-01-132-32/+34
|/ | | | | | Use the jalr instruction instead of jr in stubs and compiled code. Change-Id: Idacc5167a5bb0113dc2e7716e4767e5ed07b5e0b
* ART: Reorder entrypoint argument orderAndreas Gampe2014-12-291-55/+27
| | | | | | | | | | Shuffle the ArtMethod* referrer backwards for easier removal. Clean up ARM & MIPS assembly code. Change some macros to make future changes easier. Change-Id: Ie2862b68bd6e519438e83eecd9e1611df51d7945
* Fix typo bug for Mips32.Douglas Leung2014-12-161-1/+1
| | | | Change-Id: I429038ee6748d538fa03da819777f3456a4fd9a5
* [MIPSR6] Adjust assembly routines for MIPS R6 isaDuane Sand2014-12-162-61/+106
| | | | Change-Id: I771b58b9e8054bb99cd01a7f713ff8e29a9ae5d3
* Remove portable.Elliott Hughes2014-12-122-138/+1
| | | | Change-Id: I3bf3250fa866fd2265f1b115d52fa5dedc48a7fc
* Merge "Add JNI trampoline for mips32."Ian Rogers2014-11-223-204/+278
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| * Add JNI trampoline for mips32.Douglas Leung2014-10-313-204/+278
| | | | | | | | | | | | This patch allows the browser to come up. Change-Id: Icad9da868be76d6a08e615807fad8678ac0a110f
* | Fix the last users of TARGET_CPU_SMP.Elliott Hughes2014-11-191-4/+0
| | | | | | | | | | | | Everyone else assumes SMP. Change-Id: I7ff7faef46fbec6c67d6e446812d599e473cba39
* | Change 64 bit ArtMethod fields to be pointer sizedMathieu Chartier2014-11-182-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Changed the 64 bit entrypoint and gc map fields in ArtMethod to be pointer sized. This saves a large amount of memory on 32 bit systems. Reduces ArtMethod size by 16 bytes on 32 bit. Total number of ArtMethod on low memory mako: 169957 Image size: 49203 methods -> 787248 image size reduction. Zygote space size: 1070 methods -> 17120 size reduction. App methods: ~120k -> 2 MB savings. Savings per app on low memory mako: 125K+ per app (less active apps -> more image methods per app). Savings depend on how often the shared methods are on dirty pages vs shared. TODO in another CL, delete gc map field from ArtMethod since we should be able to get it from the Oat method header. Bug: 17643507 Change-Id: Ie9508f05907a9f693882d4d32a564460bf273ee8 (cherry picked from commit e832e64a7e82d7f72aedbd7d798fb929d458ee8f)
* | Instruction set features for ARM64, MIPS and X86.Ian Rogers2014-11-133-0/+299
| | | | | | | | | | | | | | | | | | | | | | | | | | Also, refactor how feature strings are handled so they are additive or subtractive. Make MIPS have features for FPU 32-bit and MIPS v2. Use in the quick compiler rather than #ifdefs that wouldn't have worked in cross-compilation. Add SIMD features for x86/x86-64 proposed in: https://android-review.googlesource.com/#/c/112370/ Bug: 18056890 Change-Id: Ic88ff84a714926bd277beb74a430c5c7d5ed7666
* | Merge "ART: Fix some redundant declarations"Andreas Gampe2014-11-051-80/+1
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| * | ART: Fix some redundant declarationsAndreas Gampe2014-11-041-80/+1
| | | | | | | | | | | | | | | | | | | | | Refactor entrypoint initialization such that there is a large set of common extern "C" declarations for quick entrypoints. Change-Id: Iae8548e5f7ebbf51dc6c55c4283fa89437e18c98
* | | Add ATTRIBUTE_UNUSED to unused parameters.Chih-Hung Hsieh2014-11-041-7/+13
|/ / | | | | | | | | | | | | They are reported by Clang compiler. BUG: 18244071 Change-Id: I3ebf7a9c324490adbf1135f21818c7ad83c83f3d
* | ART: Remove unnecessary includesAndreas Gampe2014-11-031-2/+1
|/ | | | | | Remove unnecessary includes from context_ISA.cc Change-Id: Ic9919c0afd081ec405a5d972d152fe996d12fa3d
* Add gp initialization to the art_quick_imt_conflict_trampoline() function.Douglas Leung2014-10-271-1/+1
| | | | | | The gp register is needed by the "la" instruction. Change-Id: I4f2dcddba503f403dd6532d0db65ddd7df1f9626
* Do not use ld instruction for Mips32.Douglas Leung2014-10-241-6/+9
| | | | Change-Id: If577b8011edb583779360934f4e50ff1779e1b70
* Refactor quick entrypointsIan Rogers2014-10-206-290/+200
| | | | | | | | | | | Remove FinishCalleeSaveFrameSetup. Assembly routines write down anchor into TLS as well as placing runtime method in callee save frame. Simplify artSet64InstanceFromCode by not computing the referrer from the stack in the C++ code. Move assembly offset tests next to constant declaration and tidy arch_test. Change-Id: Iededeebc05e54a1e2bb7bb3572b8ba012cffa1c8
* Make ART compile with GCC -O0 again.Ian Rogers2014-10-162-9/+4
| | | | | | | | | | | | | Tidy up InstructionSetFeatures so that it has a type hierarchy dependent on architecture. Add to instruction_set_test to warn when InstructionSetFeatures don't agree with ones from system properties, AT_HWCAP and /proc/cpuinfo. Clean-up class linker entry point logic to not return entry points but to test whether the passed code is the particular entrypoint. This works around image trampolines that replicate entrypoints. Bug: 17993736 Change-Id: I5f4b49e88c3b02a79f9bee04f83395146ed7be23
* Don't copy fill array data to quick literal pool.Ian Rogers2014-10-081-3/+4
| | | | | | | | | | | Currently quick copies the fill array data from the dex file to the literal pool. It then has to go through hoops to pass this PC relative address down to out-of-line code. Instead, pass the offset of the table to the out-of-line code and use the CodeItem data associated with the ArtMethod. This reduces the size of oat code while greatly simplifying it. Unify the FillArrayData implementation in quick, portable and the interpreters. Change-Id: I9c6971cf46285fbf197856627368c0185fdc98ca
* Fix mips build for nested signal handlerDave Allison2014-08-291-0/+3
| | | | | | | | Bug: 17006816 (cherry picked from commit 5a18dde067daeb55f1368d5791c61e315bfa1d99) Change-Id: Ia538e30012fed46cefba33092395c5361c571062
* Reduced memory usage of primitive fields smaller than 4-bytesFred Shih2014-08-252-2/+189
| | | | | | | | | | Reduced memory used by byte and boolean fields from 4 bytes down to a single byte and shorts and chars down to two bytes. Fields are now arranged as Reference followed by decreasing component sizes, with fields shuffled forward as needed. Bug: 8135266 Change-Id: I65eaf31ed27e5bd5ba0c7d4606454b720b074752
* Fix the THREAD_ offsets for MIPS.Raghu Gandham2014-08-151-2/+2
| | | | Change-Id: Iafa5a470d3910e819f8c8cf976213d228b8805d9
* Add implicit checks for x86_64 architecture.Dave Allison2014-08-071-1/+1
| | | | | | | | | | | | | This combines the x86 and x86_64 fault handlers into one. It also merges in the change to the entrypoints for X86_64. Replaces generic instruction length calculator with one that only works with the specific instructions we use. Bug: 16256184 Change-Id: I1e8ab5ad43f46060de9597615b423c89a836035c Signed-off-by: Chao-ying Fu <chao-ying.fu@intel.com>
* Fix test 304-method-tracing failure for Mips.Douglas Leung2014-07-161-3/+4
| | | | | Change-Id: Id5ce9fd3c880dd568b11a1deea7e42ea587934ba Signed-off-by: Douglas Leung <douglas@mips.com>
* Merge "Fix art test failures for Mips."Jeff Hao2014-07-161-4/+9
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| * Fix art test failures for Mips.Douglas Leung2014-07-151-4/+9
| | | | | | | | | | | | | | | | | | | | | | This patch fixes the following art test failures for Mips: 003-omnibus-opcodes 030-bad-finalizer 041-narrowing 059-finalizer-throw Change-Id: I4e0e9ff75f949c92059dd6b8d579450dc15f4467 Signed-off-by: Douglas Leung <douglas@mips.com>
* | Revert "Revert "Revert "Revert "Add implicit null and stack checks for x86""""Dave Allison2014-07-161-1/+2
|/ | | | | | | This reverts commit 0025a86411145eb7cd4971f9234fc21c7b4aced1. Bug: 16256184 Change-Id: Ie0760a0c293aa3b62e2885398a8c512b7a946a73
* Improve performance of invokevirtual/invokeinterface with embedded imt/vtableMingyao Yang2014-07-111-0/+2
| | | | | | | | | Add an embedded version of imt/vtable into class object. Both tables start at fixed offset within class object so method/entry point can be loaded directly from class object for invokeinterface/invokevirtual. Bug: 8142917 Change-Id: I4240d58cfbe9250107c95c0708c036854c455968
generated by cgit v1.1 at 2025-01-08 19:37:07 +0000