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* Ensure stack maps are 4 byte aligned.Nicolas Geoffray2014-12-091-1/+7
| | | | | | | | | | | | With the recent move to gcc 4.9, we are hitting alignment SIGBUS on ARM. The reason is that gcc will optimize two consecutive 32bits loads into one 64bits load, and the instruction (ldrd) will fail if the data is not aligned. Also removed the emission of mapping table when a method is optimized. The information can be found in the StackMap itself. Change-Id: Icf79406c18a3f4db3c05d52fc2c0dd2e35bf0f8f
* Tidy logging code not using UNIMPLEMENTED.Ian Rogers2014-10-241-2/+2
| | | | Change-Id: I7a79c1671a6ff8b2040887133b3e0925ef9a3cfe
* Implement register allocator for floating point registers.Nicolas Geoffray2014-10-211-0/+1
| | | | | | | | Also: - Fix misuses of emitting the rex prefix in the x86_64 assembler. - Fix movaps code generation in the x86_64 assembler. Change-Id: Ib6dcf6e7c4a9c43368cfc46b02ba50f69ae69cbe
* Runtime support for the new stack maps for the opt compiler.Nicolas Geoffray2014-09-081-32/+46
| | | | | | | Now most of the methods supported by the compiler can be optimized, instead of using the baseline. Change-Id: I80ab36a34913fa4e7dd576c7bf55af63594dc1fa
* Add a new stack map scheme that encodes compilation info per pc.Nicolas Geoffray2014-07-211-0/+307
Encodes stack mask, register mask, dex register values, and inlining info. The encoding is currently very straightforward: there is no clever encoding, nor compression. Change-Id: I5fd9ae28189a5513cd9e3c8d52c648463207643d