Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Fix store instructions to large frames in ARM opt. compiler. | Roland Levillain | 2014-11-04 | 1 | -0/+1 |
When accessing a stack frame at a large offset, use an additional core register (R5 or R6) as a temporary register whenever IP contains the value to store (and thus cannot be used by art::Thumb2Assembler::StoreToOffset as a temporary register to compute the memory address where the value is to be stored). The previous value of R5 (or R6) is saved on the stack before the emission of the store instruction and restored afterwards. Change-Id: Ic5fd5ab2c09d8327dd1f0f241d40d2c397ce64cd |