From bd4e6a828fc4aefea7d34a1bbedb81c560c60b6b Mon Sep 17 00:00:00 2001
From: nikolay serdjuk <nikolay.y.serdjuk@intel.com>
Date: Fri, 27 Mar 2015 16:32:27 +0600
Subject: Fix for incorrect parse of PEXTRW instruction

The instruction PEXTRW encoded by sequence 66 0F C5 has form:
PEXTRW reg, xmm, imm8. Its reg is encoded in the REG part and
xmm is encoded in the R/M part of ModR/M byte. Since the order
is opposite to the PEXTRB and PEXTRD, we have to set 'load' to
true and 'store' leave as false.

Change-Id: I32c42ea005eec29f7bf969f275c36ffa0a95fa6d
---
 disassembler/disassembler_x86.cc | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'disassembler')

diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc
index a1834e1..ba0c0bd 100644
--- a/disassembler/disassembler_x86.cc
+++ b/disassembler/disassembler_x86.cc
@@ -942,7 +942,7 @@ DISASSEMBLER_ENTRY(cmp,
           opcode1 = "pextrw";
           prefix[2] = 0;
           has_modrm = true;
-          store = true;
+          load = true;
           src_reg_file = SSE;
           immediate_bytes = 1;
         } else {
-- 
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