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author | Ng, David <dng@quicinc.com> | 2009-08-20 10:25:55 -0700 |
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committer | Ng, David <dng@quicinc.com> | 2009-08-20 10:27:55 -0700 |
commit | 8ed708a0a0f66d88677124b4bc79e80f61c1805f (patch) | |
tree | 7c60c5a14af1fcb6092865cc68ae765d3b15c5cd | |
parent | 0f4f3daba4a31dbfb60c63773cb11406338221b3 (diff) | |
download | bionic-8ed708a0a0f66d88677124b4bc79e80f61c1805f.zip bionic-8ed708a0a0f66d88677124b4bc79e80f61c1805f.tar.gz bionic-8ed708a0a0f66d88677124b4bc79e80f61c1805f.tar.bz2 |
bionic: Update macro check for ARM CLZ instruction
Modify the preprocessor condition to explicitly check if
the ARM CLZ instruction is supported rather than for
ARM_ARCH_5, as this instruction is also supported on
newer ARM architectures.
-rw-r--r-- | libc/arch-arm/bionic/ffs.S | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/libc/arch-arm/bionic/ffs.S b/libc/arch-arm/bionic/ffs.S index f11141c..27aa9b5 100644 --- a/libc/arch-arm/bionic/ffs.S +++ b/libc/arch-arm/bionic/ffs.S @@ -29,6 +29,7 @@ */ #include <machine/asm.h> +#include <machine/cpu-features.h> /* * ffs - find first set bit, this algorithm isolates the first set @@ -47,7 +48,7 @@ ENTRY(ffs) /* Standard trick to isolate bottom bit in r0 or 0 if r0 = 0 on entry */ rsb r1, r0, #0 ands r0, r0, r1 -#ifndef __ARM_ARCH_5__ +#if __ARM_HAVE_CLZ != 1 /* * now r0 has at most one set bit, call this X * if X = 0, all further instructions are skipped |