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| author | Brian Steuer <bsteuer@quicinc.com> | 2009-12-16 21:17:40 -0800 |
|---|---|---|
| committer | Dinesh Garg <dgarg@codeaurora.org> | 2010-06-29 11:04:00 -0700 |
| commit | 46d5ba55afd3884f9fd9febc9da021632828e4d1 (patch) | |
| tree | b6e88bf2d97cc38d63d6f4bea2496934a65ba62b | |
| parent | 5a16a1eed05daa083ae453f40121344164102e03 (diff) | |
| download | bionic-46d5ba55afd3884f9fd9febc9da021632828e4d1.zip bionic-46d5ba55afd3884f9fd9febc9da021632828e4d1.tar.gz bionic-46d5ba55afd3884f9fd9febc9da021632828e4d1.tar.bz2 | |
bionic: Change cache line size to 32
Setting the cache line size to 32 for cache readahead purposes
improves performance for most memcpy sizes.
| -rw-r--r-- | libc/arch-arm/bionic/memcpy.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/libc/arch-arm/bionic/memcpy.S b/libc/arch-arm/bionic/memcpy.S index ba55996..12e97c6 100644 --- a/libc/arch-arm/bionic/memcpy.S +++ b/libc/arch-arm/bionic/memcpy.S @@ -38,7 +38,7 @@ .align 4 /* a prefetch distance of 4 cache-lines works best experimentally */ -#define CACHE_LINE_SIZE 64 +#define CACHE_LINE_SIZE 32 #define PREFETCH_DISTANCE (CACHE_LINE_SIZE*4) memcpy: |