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author | Elliott Hughes <enh@google.com> | 2014-06-09 13:57:57 -0700 |
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committer | Elliott Hughes <enh@google.com> | 2014-06-09 13:57:57 -0700 |
commit | 9812a0233cd9e16704172fc2a455f08925d62012 (patch) | |
tree | 27637f08b4ccf43ce73c357f5a79878903048641 | |
parent | 87472963c7c50240002fd83efec69c267c0d6ec7 (diff) | |
download | bionic-9812a0233cd9e16704172fc2a455f08925d62012.zip bionic-9812a0233cd9e16704172fc2a455f08925d62012.tar.gz bionic-9812a0233cd9e16704172fc2a455f08925d62012.tar.bz2 |
Clean up the ARM fenv.h, moving implementation details into fenv.c.
Change-Id: I919d35db27ec16a6f54a7a5c3c070f33f03d9bb9
-rw-r--r-- | libm/arm/fenv.c | 27 | ||||
-rw-r--r-- | libm/include/arm/machine/fenv.h | 5 |
2 files changed, 14 insertions, 18 deletions
diff --git a/libm/arm/fenv.c b/libm/arm/fenv.c index a0108e8..2124730 100644 --- a/libm/arm/fenv.c +++ b/libm/arm/fenv.c @@ -28,10 +28,11 @@ #include <fenv.h> -/* - * Hopefully the system ID byte is immutable, so it's valid to use - * this as a default environment. - */ +#define FPSCR_ENABLE_SHIFT 8 +#define FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << FPSCR_ENABLE_SHIFT) + +#define FPSCR_RMODE_SHIFT 22 + const fenv_t __fe_dfl_env = 0; int fegetenv(fenv_t* __envp) { @@ -86,14 +87,14 @@ int fetestexcept(int __excepts) { int fegetround(void) { fenv_t _fpscr; fegetenv(&_fpscr); - return ((_fpscr >> _FPSCR_RMODE_SHIFT) & 0x3); + return ((_fpscr >> FPSCR_RMODE_SHIFT) & 0x3); } int fesetround(int __round) { fenv_t _fpscr; fegetenv(&_fpscr); - _fpscr &= ~(0x3 << _FPSCR_RMODE_SHIFT); - _fpscr |= (__round << _FPSCR_RMODE_SHIFT); + _fpscr &= ~(0x3 << FPSCR_RMODE_SHIFT); + _fpscr |= (__round << FPSCR_RMODE_SHIFT); fesetenv(&_fpscr); return 0; } @@ -102,7 +103,7 @@ int feholdexcept(fenv_t* __envp) { fenv_t __env; fegetenv(&__env); *__envp = __env; - __env &= ~(FE_ALL_EXCEPT | _FPSCR_ENABLE_MASK); + __env &= ~(FE_ALL_EXCEPT | FPSCR_ENABLE_MASK); fesetenv(&__env); return 0; } @@ -118,21 +119,21 @@ int feupdateenv(const fenv_t* __envp) { int feenableexcept(int __mask) { fenv_t __old_fpscr, __new_fpscr; fegetenv(&__old_fpscr); - __new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT; + __new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT; fesetenv(&__new_fpscr); - return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT); + return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT); } int fedisableexcept(int __mask) { fenv_t __old_fpscr, __new_fpscr; fegetenv(&__old_fpscr); - __new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << _FPSCR_ENABLE_SHIFT); + __new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT); fesetenv(&__new_fpscr); - return ((__old_fpscr >> _FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT); + return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT); } int fegetexcept(void) { fenv_t __fpscr; fegetenv(&__fpscr); - return ((__fpscr & _FPSCR_ENABLE_MASK) >> _FPSCR_ENABLE_SHIFT); + return ((__fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT); } diff --git a/libm/include/arm/machine/fenv.h b/libm/include/arm/machine/fenv.h index d8749dd..0e483e3 100644 --- a/libm/include/arm/machine/fenv.h +++ b/libm/include/arm/machine/fenv.h @@ -52,17 +52,12 @@ typedef __uint32_t fexcept_t; #define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \ FE_OVERFLOW | FE_UNDERFLOW) -#define _FPSCR_ENABLE_SHIFT 8 -#define _FPSCR_ENABLE_MASK (FE_ALL_EXCEPT << _FPSCR_ENABLE_SHIFT) - /* Rounding modes. */ #define FE_TONEAREST 0x0 #define FE_UPWARD 0x1 #define FE_DOWNWARD 0x2 #define FE_TOWARDZERO 0x3 -#define _FPSCR_RMODE_SHIFT 22 - __END_DECLS #endif /* !_ARM_FENV_H_ */ |