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| author | David 'Digit' Turner <digit@google.com> | 2009-09-18 13:35:05 -0700 |
|---|---|---|
| committer | David 'Digit' Turner <digit@google.com> | 2009-09-22 10:03:59 -0700 |
| commit | 4a05d12cf52a9a40759f11f28543bd75715c8f00 (patch) | |
| tree | 2d0beafae4775320beea102649b491b05fa50f8e /libc/arch-arm/include/machine/cpu-features.h | |
| parent | 916edf2a3fc60e08a5f29cd322d9f2a04d15cb49 (diff) | |
| download | bionic-4a05d12cf52a9a40759f11f28543bd75715c8f00.zip bionic-4a05d12cf52a9a40759f11f28543bd75715c8f00.tar.gz bionic-4a05d12cf52a9a40759f11f28543bd75715c8f00.tar.bz2 | |
Fix TLS access for ARMv6 and beyond.
For performance reasons, we don't call the kernel helper. Instead, we directly
access the TLS register on ARMv6 and higher. For ARMv5TE, keep using the hard-coded
address populated by the kernel on each task switch.
NOTE: Since we don't call the kernel helper, this must precisely match your
kernel configuration. This is controlled by setting the ARCH_ARM_HAVE_TLS_REGISTER
variable to 'true' in your board configuration file.
Diffstat (limited to 'libc/arch-arm/include/machine/cpu-features.h')
| -rw-r--r-- | libc/arch-arm/include/machine/cpu-features.h | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/libc/arch-arm/include/machine/cpu-features.h b/libc/arch-arm/include/machine/cpu-features.h index f836006..925067e 100644 --- a/libc/arch-arm/include/machine/cpu-features.h +++ b/libc/arch-arm/include/machine/cpu-features.h @@ -149,7 +149,6 @@ # define __ARM_HAVE_PC_INTERWORK #endif - /* Assembly-only macros */ /* define a handy PLD(address) macro since the cache preload |