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| author | Elliott Hughes <enh@google.com> | 2010-09-27 11:39:39 -0700 |
|---|---|---|
| committer | Android Git Automerger <android-git-automerger@android.com> | 2010-09-27 11:39:39 -0700 |
| commit | 8120a8df848e6dec31ef5f00bc0b41ed95ce1310 (patch) | |
| tree | 7adeaa352bb2e6e7f40aeb6bc2d146a194afa766 /libc/arch-arm | |
| parent | 6dbfddfe4e76790ee57ddc0a77b64a9457ec08fb (diff) | |
| parent | 3cf53d1a7814e1520df09d24b009c16f4f27db0d (diff) | |
| download | bionic-8120a8df848e6dec31ef5f00bc0b41ed95ce1310.zip bionic-8120a8df848e6dec31ef5f00bc0b41ed95ce1310.tar.gz bionic-8120a8df848e6dec31ef5f00bc0b41ed95ce1310.tar.bz2 | |
am 3cf53d1a: Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
Merge commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d' into gingerbread-plus-aosp
* commit '3cf53d1a7814e1520df09d24b009c16f4f27db0d':
Fixes for the ARM-specific bswap_16, bswap_32, and bswap_64.
Diffstat (limited to 'libc/arch-arm')
| -rw-r--r-- | libc/arch-arm/include/endian.h | 54 |
1 files changed, 25 insertions, 29 deletions
diff --git a/libc/arch-arm/include/endian.h b/libc/arch-arm/include/endian.h index e34872f..6de0889 100644 --- a/libc/arch-arm/include/endian.h +++ b/libc/arch-arm/include/endian.h @@ -33,14 +33,14 @@ #ifdef __GNUC__ -/* NOTE: header <machine/cpu-features.h> could not be included directly - * since it defines extra macros, such as PLD. +/* + * REV and REV16 weren't available on ARM5 or ARM4. + * We don't include <machine/cpu-features.h> because it pollutes the + * namespace with macros like PLD. */ -#if defined(__ARM_ARCH_7A__) || defined(__ARM_ARCH_7R__) || \ - defined(__ARM_ARCH_7__) || \ - defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \ - defined(__ARM_ARCH_6K__) || defined(__ARM_ARCH_6Z__) || \ - defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_6T2__) +#if !defined __ARM_ARCH_5__ && !defined __ARM_ARCH_5T__ && \ + !defined __ARM_ARCH_5TE__ && !defined __ARM_ARCH_5TEJ__ && \ + !defined __ARM_ARCH_4T__ && !defined __ARM_ARCH_4__ /* According to RealView Assembler User's Guide, REV and REV16 are available * in Thumb code and 16-bit instructions when used in Thumb-2 code. @@ -50,44 +50,40 @@ * * REV16 Rd, Rm * Rd and Rm must both be Lo registers. + * + * The +l constraint takes care of this without constraining us in ARM mode. */ -#ifdef __thumb__ -#define REV_LO_REG asm("r4") -#else -#define REV_LO_REG -#endif - -#define __swap16md(x) ({ \ - register u_int16_t _x REV_LO_REG = (x); \ - __asm volatile ("rev16 %0, %0" : "+r" (_x)); \ - _x; \ +#define __swap16md(x) ({ \ + register u_int16_t _x = (x); \ + __asm volatile ("rev16 %0, %0" : "+l" (_x)); \ + _x; \ }) -#define __swap32md(x) ({ \ - register u_int32_t _x REV_LO_REG = (x); \ - __asm volatile ("rev %0, %0" : "+r" (_x)); \ - _x; \ +#define __swap32md(x) ({ \ + register u_int32_t _x = (x); \ + __asm volatile ("rev %0, %0" : "+l" (_x)); \ + _x; \ }) -#define __swap64md(x) ({ \ - u_int64_t _x = (x); \ - (u_int64_t) __swap32md(_x >> 32) | \ - (u_int64_t) __swap32md(_x & 0xffffffff) << 32; \ +#define __swap64md(x) ({ \ + u_int64_t _swap64md_x = (x); \ + (u_int64_t) __swap32md(_swap64md_x >> 32) | \ + (u_int64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \ }) /* Tell sys/endian.h we have MD variants of the swap macros. */ #define MD_SWAP -#endif /* __ARM_ARCH__ */ -#endif /* __GNUC__ */ +#endif /* __ARM_ARCH__ */ +#endif /* __GNUC__ */ #ifdef __ARMEB__ #define _BYTE_ORDER _BIG_ENDIAN #else #define _BYTE_ORDER _LITTLE_ENDIAN #endif -#define __STRICT_ALIGNMENT +#define __STRICT_ALIGNMENT #include <sys/types.h> #include <sys/endian.h> -#endif /* !_ARM_ENDIAN_H_ */ +#endif /* !_ARM_ENDIAN_H_ */ |