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author | The Android Open Source Project <initial-contribution@android.com> | 2009-03-03 18:28:13 -0800 |
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committer | The Android Open Source Project <initial-contribution@android.com> | 2009-03-03 18:28:13 -0800 |
commit | 1767f908af327fa388b1c66883760ad851267013 (patch) | |
tree | 4b825dc642cb6eb9a060e54bf8d69288fbee4904 /libc/kernel/common/linux/mtd/onenand_regs.h | |
parent | a799b53f10e5a6fd51fef4436cfb7ec99836a516 (diff) | |
download | bionic-1767f908af327fa388b1c66883760ad851267013.zip bionic-1767f908af327fa388b1c66883760ad851267013.tar.gz bionic-1767f908af327fa388b1c66883760ad851267013.tar.bz2 |
auto import from //depot/cupcake/@135843
Diffstat (limited to 'libc/kernel/common/linux/mtd/onenand_regs.h')
-rw-r--r-- | libc/kernel/common/linux/mtd/onenand_regs.h | 143 |
1 files changed, 0 insertions, 143 deletions
diff --git a/libc/kernel/common/linux/mtd/onenand_regs.h b/libc/kernel/common/linux/mtd/onenand_regs.h deleted file mode 100644 index a39c78f..0000000 --- a/libc/kernel/common/linux/mtd/onenand_regs.h +++ /dev/null @@ -1,143 +0,0 @@ -/**************************************************************************** - **************************************************************************** - *** - *** This header was automatically generated from a Linux kernel header - *** of the same name, to make information necessary for userspace to - *** call into the kernel available to libc. It contains only constants, - *** structures, and macros generated from the original header, and thus, - *** contains no copyrightable information. - *** - **************************************************************************** - ****************************************************************************/ -#ifndef __ONENAND_REG_H -#define __ONENAND_REG_H - -#define ONENAND_MEMORY_MAP(x) ((x) << 1) - -#define ONENAND_BOOTRAM ONENAND_MEMORY_MAP(0x0000) -#define ONENAND_DATARAM ONENAND_MEMORY_MAP(0x0200) -#define ONENAND_SPARERAM ONENAND_MEMORY_MAP(0x8010) - -#define ONENAND_REG_MANUFACTURER_ID ONENAND_MEMORY_MAP(0xF000) -#define ONENAND_REG_DEVICE_ID ONENAND_MEMORY_MAP(0xF001) -#define ONENAND_REG_VERSION_ID ONENAND_MEMORY_MAP(0xF002) -#define ONENAND_REG_DATA_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF003) -#define ONENAND_REG_BOOT_BUFFER_SIZE ONENAND_MEMORY_MAP(0xF004) -#define ONENAND_REG_NUM_BUFFERS ONENAND_MEMORY_MAP(0xF005) -#define ONENAND_REG_TECHNOLOGY ONENAND_MEMORY_MAP(0xF006) - -#define ONENAND_REG_START_ADDRESS1 ONENAND_MEMORY_MAP(0xF100) -#define ONENAND_REG_START_ADDRESS2 ONENAND_MEMORY_MAP(0xF101) -#define ONENAND_REG_START_ADDRESS3 ONENAND_MEMORY_MAP(0xF102) -#define ONENAND_REG_START_ADDRESS4 ONENAND_MEMORY_MAP(0xF103) -#define ONENAND_REG_START_ADDRESS5 ONENAND_MEMORY_MAP(0xF104) -#define ONENAND_REG_START_ADDRESS6 ONENAND_MEMORY_MAP(0xF105) -#define ONENAND_REG_START_ADDRESS7 ONENAND_MEMORY_MAP(0xF106) -#define ONENAND_REG_START_ADDRESS8 ONENAND_MEMORY_MAP(0xF107) - -#define ONENAND_REG_START_BUFFER ONENAND_MEMORY_MAP(0xF200) -#define ONENAND_REG_COMMAND ONENAND_MEMORY_MAP(0xF220) -#define ONENAND_REG_SYS_CFG1 ONENAND_MEMORY_MAP(0xF221) -#define ONENAND_REG_SYS_CFG2 ONENAND_MEMORY_MAP(0xF222) -#define ONENAND_REG_CTRL_STATUS ONENAND_MEMORY_MAP(0xF240) -#define ONENAND_REG_INTERRUPT ONENAND_MEMORY_MAP(0xF241) -#define ONENAND_REG_START_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24C) -#define ONENAND_REG_END_BLOCK_ADDRESS ONENAND_MEMORY_MAP(0xF24D) -#define ONENAND_REG_WP_STATUS ONENAND_MEMORY_MAP(0xF24E) - -#define ONENAND_REG_ECC_STATUS ONENAND_MEMORY_MAP(0xFF00) -#define ONENAND_REG_ECC_M0 ONENAND_MEMORY_MAP(0xFF01) -#define ONENAND_REG_ECC_S0 ONENAND_MEMORY_MAP(0xFF02) -#define ONENAND_REG_ECC_M1 ONENAND_MEMORY_MAP(0xFF03) -#define ONENAND_REG_ECC_S1 ONENAND_MEMORY_MAP(0xFF04) -#define ONENAND_REG_ECC_M2 ONENAND_MEMORY_MAP(0xFF05) -#define ONENAND_REG_ECC_S2 ONENAND_MEMORY_MAP(0xFF06) -#define ONENAND_REG_ECC_M3 ONENAND_MEMORY_MAP(0xFF07) -#define ONENAND_REG_ECC_S3 ONENAND_MEMORY_MAP(0xFF08) - -#define ONENAND_DEVICE_DENSITY_SHIFT (4) -#define ONENAND_DEVICE_IS_DDP (1 << 3) -#define ONENAND_DEVICE_IS_DEMUX (1 << 2) -#define ONENAND_DEVICE_VCC_MASK (0x3) - -#define ONENAND_DEVICE_DENSITY_512Mb (0x002) - -#define ONENAND_VERSION_PROCESS_SHIFT (8) - -#define ONENAND_DDP_SHIFT (15) - -#define ONENAND_FPA_MASK (0x3f) -#define ONENAND_FPA_SHIFT (2) -#define ONENAND_FSA_MASK (0x03) - -#define ONENAND_BSA_MASK (0x03) -#define ONENAND_BSA_SHIFT (8) -#define ONENAND_BSA_BOOTRAM (0 << 2) -#define ONENAND_BSA_DATARAM0 (2 << 2) -#define ONENAND_BSA_DATARAM1 (3 << 2) -#define ONENAND_BSC_MASK (0x03) - -#define ONENAND_CMD_READ (0x00) -#define ONENAND_CMD_READOOB (0x13) -#define ONENAND_CMD_PROG (0x80) -#define ONENAND_CMD_PROGOOB (0x1A) -#define ONENAND_CMD_UNLOCK (0x23) -#define ONENAND_CMD_LOCK (0x2A) -#define ONENAND_CMD_LOCK_TIGHT (0x2C) -#define ONENAND_CMD_ERASE (0x94) -#define ONENAND_CMD_RESET (0xF0) -#define ONENAND_CMD_OTP_ACCESS (0x65) -#define ONENAND_CMD_READID (0x90) - -#define ONENAND_CMD_BUFFERRAM (0x1978) - -#define ONENAND_SYS_CFG1_SYNC_READ (1 << 15) -#define ONENAND_SYS_CFG1_BRL_7 (7 << 12) -#define ONENAND_SYS_CFG1_BRL_6 (6 << 12) -#define ONENAND_SYS_CFG1_BRL_5 (5 << 12) -#define ONENAND_SYS_CFG1_BRL_4 (4 << 12) -#define ONENAND_SYS_CFG1_BRL_3 (3 << 12) -#define ONENAND_SYS_CFG1_BRL_10 (2 << 12) -#define ONENAND_SYS_CFG1_BRL_9 (1 << 12) -#define ONENAND_SYS_CFG1_BRL_8 (0 << 12) -#define ONENAND_SYS_CFG1_BRL_SHIFT (12) -#define ONENAND_SYS_CFG1_BL_32 (4 << 9) -#define ONENAND_SYS_CFG1_BL_16 (3 << 9) -#define ONENAND_SYS_CFG1_BL_8 (2 << 9) -#define ONENAND_SYS_CFG1_BL_4 (1 << 9) -#define ONENAND_SYS_CFG1_BL_CONT (0 << 9) -#define ONENAND_SYS_CFG1_BL_SHIFT (9) -#define ONENAND_SYS_CFG1_NO_ECC (1 << 8) -#define ONENAND_SYS_CFG1_RDY (1 << 7) -#define ONENAND_SYS_CFG1_INT (1 << 6) -#define ONENAND_SYS_CFG1_IOBE (1 << 5) -#define ONENAND_SYS_CFG1_RDY_CONF (1 << 4) - -#define ONENAND_CTRL_ONGO (1 << 15) -#define ONENAND_CTRL_LOCK (1 << 14) -#define ONENAND_CTRL_LOAD (1 << 13) -#define ONENAND_CTRL_PROGRAM (1 << 12) -#define ONENAND_CTRL_ERASE (1 << 11) -#define ONENAND_CTRL_ERROR (1 << 10) -#define ONENAND_CTRL_RSTB (1 << 7) -#define ONENAND_CTRL_OTP_L (1 << 6) -#define ONENAND_CTRL_OTP_BL (1 << 5) - -#define ONENAND_INT_MASTER (1 << 15) -#define ONENAND_INT_READ (1 << 7) -#define ONENAND_INT_WRITE (1 << 6) -#define ONENAND_INT_ERASE (1 << 5) -#define ONENAND_INT_RESET (1 << 4) -#define ONENAND_INT_CLEAR (0 << 0) - -#define ONENAND_WP_US (1 << 2) -#define ONENAND_WP_LS (1 << 1) -#define ONENAND_WP_LTS (1 << 0) - -#define ONENAND_ECC_1BIT (1 << 0) -#define ONENAND_ECC_2BIT (1 << 1) -#define ONENAND_ECC_2BIT_ALL (0xAAAA) - -#define ONENAND_OTP_LOCK_OFFSET (14) - -#endif |