diff options
author | Jim Huang <jserv@0xlab.org> | 2011-12-12 16:20:11 +0800 |
---|---|---|
committer | Ricardo Cerqueira <cyanogenmod@cerqueira.org> | 2012-07-10 20:32:25 +0100 |
commit | bdf22281cdbf21bc599caf308770d1f07f81440c (patch) | |
tree | 476a3b9b3da0ac35532da25f581a927bb7ae0c0d /libc | |
parent | 259b660f6a51be7f627e7c2a6376af0b21b55fbb (diff) | |
download | bionic-bdf22281cdbf21bc599caf308770d1f07f81440c.zip bionic-bdf22281cdbf21bc599caf308770d1f07f81440c.tar.gz bionic-bdf22281cdbf21bc599caf308770d1f07f81440c.tar.bz2 |
dlmalloc: Use ARMv7 version for macro compute_bit2idx and compute_tree_index
The macro compute_bit2idx(X, I) was definied as "I = ffs(X)-1". This
equals to the operation __builtin_ctz(X), and using the new bit-reversal
instruction would have been better for ARMv7:
rbit r0, r0
clz r0, r0
This patch re-implements macro compute_bit2idx and compute_tree_index by means
of the above ARMv7 instructions to be more efficient.
Reference: http://hardwarebug.org/2010/01/14/beware-the-builtins/
NOTE: in ICS, the value of macro USE_BUILTIN_FFS was defined to be 0.
Change-Id: I9d9f31d6dab0898e56bb925e29ae1c098d841fe2
Diffstat (limited to 'libc')
-rw-r--r-- | libc/bionic/dlmalloc.c | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/libc/bionic/dlmalloc.c b/libc/bionic/dlmalloc.c index f88a813..dbefae7 100644 --- a/libc/bionic/dlmalloc.c +++ b/libc/bionic/dlmalloc.c @@ -465,6 +465,12 @@ DEFAULT_MMAP_THRESHOLD default: 256K */ +#ifdef ANDROID +#ifdef __arm__ +#include <machine/cpu-features.h> +#endif +#endif /* ANDROID */ + #ifndef WIN32 #ifdef _WIN32 #define WIN32 1 @@ -2415,6 +2421,22 @@ static size_t traverse_and_check(mstate m); I = (bindex_t)((K << 1) + ((S >> (K + (TREEBIN_SHIFT-1)) & 1)));\ }\ } +#elif defined(__GNUC__) && defined(__ARM_ARCH__) && __ARM_ARCH__ >= 7 +#define compute_tree_index(S, I)\ +{\ + size_t X = S >> TREEBIN_SHIFT;\ + if (X == 0)\ + I = 0;\ + else if (X > 0xFFFF)\ + I = NTREEBINS-1;\ + else {\ + unsigned int K;\ + __asm__ ("rbit %0, %1\n"\ + "clz %0, %0"\ + : "=r" (K) : "r" (X));\ + I = (bindex_t)((K << 1) + ((S >> (K + (TREEBIN_SHIFT-1)) & 1)));\ + }\ +} #else /* GNUC */ #define compute_tree_index(S, I)\ {\ @@ -2475,6 +2497,17 @@ static size_t traverse_and_check(mstate m); } #else /* GNUC */ +#if defined(__ARM_ARCH__) && __ARM_ARCH__ >= 7 +#define compute_bit2idx(X, I) \ +{ \ + unsigned int J; \ + __asm__ ("rbit %0, %1\n" \ + "clz %0, %0" \ + : "=r" (J) : "r" (X)); \ + I = (bindex_t) J; \ +} + +#else /* ARM_ARCH */ #if USE_BUILTIN_FFS #define compute_bit2idx(X, I) I = ffs(X)-1 @@ -2490,6 +2523,7 @@ static size_t traverse_and_check(mstate m); N += K = Y >> (1-0) & 1; Y >>= K;\ I = (bindex_t)(N + Y);\ } +#endif /* ARM_ARCH */ #endif /* USE_BUILTIN_FFS */ #endif /* GNUC */ |