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-rw-r--r--libc/arch-arm64/include/machine/setjmp.h45
1 files changed, 1 insertions, 44 deletions
diff --git a/libc/arch-arm64/include/machine/setjmp.h b/libc/arch-arm64/include/machine/setjmp.h
index 1c237da..27c2fe5 100644
--- a/libc/arch-arm64/include/machine/setjmp.h
+++ b/libc/arch-arm64/include/machine/setjmp.h
@@ -26,48 +26,5 @@
* SUCH DAMAGE.
*/
-/*
- * machine/setjmp.h: machine dependent setjmp-related information.
- */
-
-/* _JBLEN is the size of a jmp_buf in longs(64bit on AArch64) */
+/* _JBLEN is the size of a jmp_buf in longs (64bit on AArch64) */
#define _JBLEN 32
-
-/* According to AARCH64 PCS document we need to save the following
- * registers:
- *
- * Core x19 - x30, sp (see section 5.1.1)
- * VFP d8 - d15 (see section 5.1.2)
- *
- * NOTE: All the registers saved here will have 64bit vales (except FPSR).
- * AAPCS mandates that the higher part of q registers does not need to
- * be saveved by the callee.
- */
-
-/* The structure of jmp_buf for AArch64:
- *
- * NOTE: _JBLEN is the size of jmp_buf in longs(64bit on AArch64)! The table
- * below computes the offsets in words(32bit).
- *
- * word name description
- * 0 magic magic number
- * 1 sigmask signal mask (not used with _setjmp / _longjmp)
- * 2 core_base base of core registers (x19-x30, sp)
- * 28 float_base base of float registers (d8-d15)
- * 44 reserved reserved entries (room to grow)
- * 64
- *
- *
- * NOTE: The instructions that load/store core/vfp registers expect 8-byte
- * alignment. Contrary to the previous setjmp header for ARM we do not
- * need to save status/control registers for VFP (it is not a
- * requirement for setjmp).
- */
-
-#define _JB_MAGIC 0
-#define _JB_SIGMASK (_JB_MAGIC+1)
-#define _JB_CORE_BASE (_JB_SIGMASK+1)
-#define _JB_FLOAT_BASE (_JB_CORE_BASE + (31-19+1)*2)
-
-#define _JB_MAGIC__SETJMP 0x53657200
-#define _JB_MAGIC_SETJMP 0x53657201