diff options
Diffstat (limited to 'libc/arch-arm')
| -rw-r--r-- | libc/arch-arm/bionic/__sig_restorer.S | 7 | ||||
| -rw-r--r-- | libc/arch-arm/bionic/_setjmp.S | 53 | ||||
| -rw-r--r-- | libc/arch-arm/bionic/atomics_arm.S | 133 | ||||
| -rw-r--r-- | libc/arch-arm/bionic/setjmp.S | 62 | ||||
| -rw-r--r-- | libc/arch-arm/bionic/sigaction.c | 29 | ||||
| -rw-r--r-- | libc/arch-arm/include/machine/cpu-features.h | 35 | ||||
| -rw-r--r-- | libc/arch-arm/include/machine/setjmp.h | 139 | ||||
| -rw-r--r-- | libc/arch-arm/syscalls.mk | 5 | ||||
| -rw-r--r-- | libc/arch-arm/syscalls/__fstatfs64.S (renamed from libc/arch-arm/syscalls/fstatfs.S) | 6 | ||||
| -rw-r--r-- | libc/arch-arm/syscalls/sigaction.S (renamed from libc/arch-arm/syscalls/__sigaction.S) | 6 | ||||
| -rw-r--r-- | libc/arch-arm/syscalls/sysinfo.S | 19 |
11 files changed, 265 insertions, 229 deletions
diff --git a/libc/arch-arm/bionic/__sig_restorer.S b/libc/arch-arm/bionic/__sig_restorer.S deleted file mode 100644 index 3f6f284..0000000 --- a/libc/arch-arm/bionic/__sig_restorer.S +++ /dev/null @@ -1,7 +0,0 @@ -.global __sig_restorer - -/* This is the opcode sequence GDB looks for in order to recognize - this stack frame as a signal trampoline (see sigaction.c) */ -__sig_restorer: - mov r7, #119 /* __NR_sigreturn */ - swi #0 diff --git a/libc/arch-arm/bionic/_setjmp.S b/libc/arch-arm/bionic/_setjmp.S index 6a27af2..5626219 100644 --- a/libc/arch-arm/bionic/_setjmp.S +++ b/libc/arch-arm/bionic/_setjmp.S @@ -3,6 +3,7 @@ /* * Copyright (c) 1997 Mark Brinicombe + * Copyright (c) 2010 Android Open Source Project. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -35,6 +36,7 @@ #include <machine/asm.h> #include <machine/setjmp.h> +#include <machine/cpu-features.h> /* * C library -- _setjmp, _longjmp @@ -51,18 +53,20 @@ ENTRY(_setjmp) ldr r1, .L_setjmp_magic - str r1, [r0], #4 -#ifdef SOFTFLOAT - add r0, r0, #52 -#else - /* Store fp registers */ - sfm f4, 4, [r0], #48 - /* Store fpsr */ - rfs r1 - str r1, [r0], #0x0004 -#endif /* SOFTFLOAT */ - /* Store integer registers */ - stmia r0, {r4-r14} + str r1, [r0, #(_JB_MAGIC * 4)] + + /* Store core registers */ + add r1, r0, #(_JB_CORE_BASE * 4) + stmia r1, {r4-r14} + +#ifdef __ARM_HAVE_VFP + /* Store floating-point registers */ + add r1, r0, #(_JB_FLOAT_BASE * 4) + vstmia r1, {d8-d15} + /* Store floating-point state */ + fmrx r1, fpscr + str r1, [r0, #(_JB_FLOAT_STATE * 4)] +#endif /* __ARM_HAVE_VFP */ mov r0, #0x00000000 bx lr @@ -72,21 +76,22 @@ ENTRY(_setjmp) ENTRY(_longjmp) ldr r2, .L_setjmp_magic - ldr r3, [r0], #4 + ldr r3, [r0, #(_JB_MAGIC * 4)] teq r2, r3 bne botch -#ifdef SOFTFLOAT - add r0, r0, #52 -#else - /* Restore fp registers */ - lfm f4, 4, [r0], #48 - /* Restore fpsr */ - ldr r4, [r0], #0x0004 - wfs r4 -#endif /* SOFTFLOAT */ - /* Restore integer registers */ - ldmia r0, {r4-r14} +#ifdef __ARM_HAVE_VFP + /* Restore floating-point registers */ + add r2, r0, #(_JB_FLOAT_BASE * 4) + vldmia r2, {d8-d15} + /* Restore floating-point state */ + ldr r2, [r0, #(_JB_FLOAT_STATE * 4)] + fmxr fpscr, r2 +#endif /* __ARM_HAVE_VFP */ + + /* Restore core registers */ + add r2, r0, #(_JB_CORE_BASE * 4) + ldmia r2, {r4-r14} /* Validate sp and r14 */ teq sp, #0 diff --git a/libc/arch-arm/bionic/atomics_arm.S b/libc/arch-arm/bionic/atomics_arm.S index f2e369d..d94f6b1 100644 --- a/libc/arch-arm/bionic/atomics_arm.S +++ b/libc/arch-arm/bionic/atomics_arm.S @@ -26,6 +26,7 @@ * SUCH DAMAGE. */ #include <sys/linux-syscalls.h> +#include <machine/cpu-features.h> .global __atomic_cmpxchg .type __atomic_cmpxchg, %function @@ -39,9 +40,73 @@ #define FUTEX_WAIT 0 #define FUTEX_WAKE 1 -#if 1 - .equ kernel_cmpxchg, 0xFFFF0FC0 - .equ kernel_atomic_base, 0xFFFF0FFF +#if defined(__ARM_HAVE_LDREX_STREX) +/* + * =========================================================================== + * ARMv6+ implementation + * =========================================================================== + */ + +/* r0(addr) -> r0(old) */ +__atomic_dec: + .fnstart + mov r1, r0 @ copy addr so we don't clobber it +1: ldrex r0, [r1] @ load current value into r0 + sub r2, r0, #1 @ generate new value into r2 + strex r3, r2, [r1] @ try to store new value; result in r3 + cmp r3, #0 @ success? + bxeq lr @ yes, return + b 1b @ no, retry + .fnend + +/* r0(addr) -> r0(old) */ +__atomic_inc: + .fnstart + mov r1, r0 +1: ldrex r0, [r1] + add r2, r0, #1 + strex r3, r2, [r1] + cmp r3, #0 + bxeq lr + b 1b + .fnend + +/* r0(old) r1(new) r2(addr) -> r0(zero_if_succeeded) */ +__atomic_cmpxchg: + .fnstart +1: mov ip, #2 @ ip=2 means "new != old" + ldrex r3, [r2] @ load current value into r3 + teq r0, r3 @ new == old? + strexeq ip, r1, [r2] @ yes, try store, set ip to 0 or 1 + teq ip, #1 @ strex failure? + beq 1b @ yes, retry + mov r0, ip @ return 0 on success, 2 on failure + bx lr + .fnend + +/* r0(new) r1(addr) -> r0(old) */ +__atomic_swap: + .fnstart +1: ldrex r2, [r1] + strex r3, r0, [r1] + teq r3, #0 + bne 1b + mov r0, r2 + bx lr + .fnend + +#else /*not defined __ARM_HAVE_LDREX_STREX*/ +/* + * =========================================================================== + * Pre-ARMv6 implementation + * =========================================================================== + */ + + /* int __kernel_cmpxchg(int oldval, int newval, int* ptr) */ + .equ kernel_cmpxchg, 0xFFFF0FC0 + .equ kernel_atomic_base, 0xFFFF0FFF + +/* r0(addr) -> r0(old) */ __atomic_dec: .fnstart .save {r4, lr} @@ -59,6 +124,7 @@ __atomic_dec: bx lr .fnend +/* r0(addr) -> r0(old) */ __atomic_inc: .fnstart .save {r4, lr} @@ -95,64 +161,16 @@ __atomic_cmpxchg: ldmia sp!, {r4, lr} bx lr .fnend -#else -#define KUSER_CMPXCHG 0xffffffc0 - -/* r0(old) r1(new) r2(addr) -> r0(zero_if_succeeded) */ -__atomic_cmpxchg: - stmdb sp!, {r4, lr} - mov r4, r0 /* r4 = save oldvalue */ -1: add lr, pc, #4 - mov r0, r4 /* r0 = oldvalue */ - mov pc, #KUSER_CMPXCHG - bcs 2f /* swap was made. we're good, return. */ - ldr r3, [r2] /* swap not made, see if it's because *ptr!=oldvalue */ - cmp r3, r4 - beq 1b -2: ldmia sp!, {r4, lr} - bx lr - -/* r0(addr) -> r0(old) */ -__atomic_dec: - stmdb sp!, {r4, lr} - mov r2, r0 /* address */ -1: ldr r0, [r2] /* oldvalue */ - add lr, pc, #4 - sub r1, r0, #1 /* newvalue = oldvalue - 1 */ - mov pc, #KUSER_CMPXCHG - bcc 1b /* no swap, try again until we get it right */ - mov r0, ip /* swapped, return the old value */ - ldmia sp!, {r4, lr} - bx lr - -/* r0(addr) -> r0(old) */ -__atomic_inc: - stmdb sp!, {r4, lr} - mov r2, r0 /* address */ -1: ldr r0, [r2] /* oldvalue */ - add lr, pc, #4 - add r1, r0, #1 /* newvalue = oldvalue + 1 */ - mov pc, #KUSER_CMPXCHG - bcc 1b /* no swap, try again until we get it right */ - mov r0, ip /* swapped, return the old value */ - ldmia sp!, {r4, lr} - bx lr -#endif /* r0(new) r1(addr) -> r0(old) */ -/* replaced swp instruction with ldrex/strex for ARMv6 & ARMv7 */ __atomic_swap: -#if defined (__ARM_HAVE_LDREX_STREX) -1: ldrex r2, [r1] - strex r3, r0, [r1] - teq r3, #0 - bne 1b - mov r0, r2 - mcr p15, 0, r0, c7, c10, 5 /* or, use dmb */ -#else + .fnstart swp r0, r0, [r1] -#endif bx lr + .fnend + +#endif /*not defined __ARM_HAVE_LDREX_STREX*/ + /* __futex_wait(*ftx, val, *timespec) */ /* __futex_wake(*ftx, counter) */ @@ -197,6 +215,8 @@ __futex_wait: .fnend __futex_wake: + .fnstart + .save {r4, r7} stmdb sp!, {r4, r7} mov r2, r1 mov r1, #FUTEX_WAKE @@ -204,6 +224,7 @@ __futex_wake: swi #0 ldmia sp!, {r4, r7} bx lr + .fnend #else diff --git a/libc/arch-arm/bionic/setjmp.S b/libc/arch-arm/bionic/setjmp.S index a9f6ea4..59aff66 100644 --- a/libc/arch-arm/bionic/setjmp.S +++ b/libc/arch-arm/bionic/setjmp.S @@ -3,6 +3,7 @@ /* * Copyright (c) 1997 Mark Brinicombe + * Copyright (c) 2010 Android Open Source Project. * All rights reserved. * * Redistribution and use in source and binary forms, with or without @@ -35,6 +36,7 @@ #include <machine/asm.h> #include <machine/setjmp.h> +#include <machine/cpu-features.h> /* * C library -- setjmp, longjmp @@ -57,24 +59,26 @@ ENTRY(setjmp) ldmfd sp!, {r0, r14} /* Store signal mask */ - str r1, [r0, #(25 * 4)] + str r1, [r0, #(_JB_SIGMASK * 4)] ldr r1, .Lsetjmp_magic - str r1, [r0], #4 + str r1, [r0, #(_JB_MAGIC * 4)] -#ifdef SOFTFLOAT - add r0, r0, #52 -#else - /* Store fp registers */ - sfm f4, 4, [r0], #48 - /* Store fpsr */ - rfs r1 - str r1, [r0], #0x0004 -#endif /*SOFTFLOAT*/ - /* Store integer registers */ - stmia r0, {r4-r14} - mov r0, #0x00000000 - bx lr + /* Store core registers */ + add r1, r0, #(_JB_CORE_BASE * 4) + stmia r1, {r4-r14} + +#ifdef __ARM_HAVE_VFP + /* Store floating-point registers */ + add r1, r0, #(_JB_FLOAT_BASE * 4) + vstmia r1, {d8-d15} + /* Store floating-point state */ + fmrx r1, fpscr + str r1, [r0, #(_JB_FLOAT_STATE * 4)] +#endif /* __ARM_HAVE_VFP */ + + mov r0, #0x00000000 + bx lr .Lsetjmp_magic: .word _JB_MAGIC_SETJMP @@ -82,12 +86,12 @@ ENTRY(setjmp) ENTRY(longjmp) ldr r2, .Lsetjmp_magic - ldr r3, [r0] + ldr r3, [r0, #(_JB_MAGIC * 4)] teq r2, r3 bne botch /* Fetch signal mask */ - ldr r2, [r0, #(25 * 4)] + ldr r2, [r0, #(_JB_SIGMASK * 4)] /* Set signal mask */ stmfd sp!, {r0, r1, r14} @@ -99,18 +103,18 @@ ENTRY(longjmp) add sp, sp, #4 /* unalign the stack */ ldmfd sp!, {r0, r1, r14} - add r0, r0, #4 -#ifdef SOFTFLOAT - add r0, r0, #52 -#else - /* Restore fp registers */ - lfm f4, 4, [r0], #48 - /* Restore FPSR */ - ldr r4, [r0], #0x0004 - wfs r4 -#endif /* SOFTFLOAT */ - /* Restore integer registers */ - ldmia r0, {r4-r14} +#ifdef __ARM_HAVE_VFP + /* Restore floating-point registers */ + add r2, r0, #(_JB_FLOAT_BASE * 4) + vldmia r2, {d8-d15} + /* Restore floating-point state */ + ldr r2, [r0, #(_JB_FLOAT_STATE * 4)] + fmxr fpscr, r2 +#endif /* __ARM_HAVE_VFP */ + + /* Restore core registers */ + add r2, r0, #(_JB_CORE_BASE * 4) + ldmia r2, {r4-r14} /* Validate sp and r14 */ teq sp, #0 diff --git a/libc/arch-arm/bionic/sigaction.c b/libc/arch-arm/bionic/sigaction.c deleted file mode 100644 index 96ca7c6..0000000 --- a/libc/arch-arm/bionic/sigaction.c +++ /dev/null @@ -1,29 +0,0 @@ -#include <signal.h> - -extern int __sigaction(int signum, const struct sigaction *act, struct sigaction *oldact); -extern void __sig_restorer(); - -int sigaction(int signum, const struct sigaction *act, struct sigaction *oldact) -{ - struct sigaction real_act; - - /* If the caller has not set a custom restorer, then set up a default one. - * The code will function properly without this, however GDB will not be - * able to recognize the stack frame as a signal trampoline, because it - * is hardcoded to look for the instruction sequence that glibc uses in - * its custom restorer. By creating our own restorer with the same - * sequence, we ensure that GDB correctly identifies this as a signal - * trampoline frame. - * - * See http://sourceware.org/ml/gdb/2010-01/msg00143.html for more - * information on this.*/ - if(act && !(act->sa_flags & SA_RESTORER)) { - real_act = *act; - real_act.sa_flags |= SA_RESTORER; - real_act.sa_restorer = __sig_restorer; - - act = &real_act; - } - - return __sigaction(signum, act, oldact); -} diff --git a/libc/arch-arm/include/machine/cpu-features.h b/libc/arch-arm/include/machine/cpu-features.h index 5af325b..39c1db3 100644 --- a/libc/arch-arm/include/machine/cpu-features.h +++ b/libc/arch-arm/include/machine/cpu-features.h @@ -38,7 +38,7 @@ * IMPORTANT: We have no intention to support anything below an ARMv4T ! */ -/* _ARM_ARCH_REVISION is a number corresponding to the ARM revision +/* __ARM_ARCH__ is a number corresponding to the ARM revision * we're going to support * * it looks like our toolchain doesn't define __ARM_ARCH__ @@ -142,20 +142,47 @@ * * ldr pc, [<some address>] * - * note that this affects any instruction that explicitely changes the + * note that this affects any instruction that explicitly changes the * value of the pc register, including ldm { ...,pc } or 'add pc, #offset' */ #if __ARM_ARCH__ >= 5 # define __ARM_HAVE_PC_INTERWORK #endif -/* define __ARM_HAVE_LDREX_STREX for ARMv6 and ARMv7 architecure to be - * used in replacement of depricated swp instruction +/* define __ARM_HAVE_LDREX_STREX for ARMv6 and ARMv7 architecture to be + * used in replacement of deprecated swp instruction */ #if __ARM_ARCH__ >= 6 # define __ARM_HAVE_LDREX_STREX #endif +/* define __ARM_HAVE_DMB for ARMv7 architecture + */ +#if __ARM_ARCH__ >= 7 +# define __ARM_HAVE_DMB +#endif + +/* define __ARM_HAVE_LDREXD for ARMv7 architecture + * (also present in ARMv6K, but not implemented in ARMv7-M, neither of which + * we care about) + */ +#if __ARM_ARCH__ >= 7 +# define __ARM_HAVE_LDREXD +#endif + +/* define _ARM_HAVE_VFP if we have VFPv3 + */ +#if __ARM_ARCH__ >= 7 && defined __VFP_FP__ +# define __ARM_HAVE_VFP +#endif + +/* define _ARM_HAVE_NEON for ARMv7 architecture if we support the + * Neon SIMD instruction set extensions. This also implies + * that VFPv3-D32 is supported. + */ +#if __ARM_ARCH__ >= 7 && defined __ARM_NEON__ +# define __ARM_HAVE_NEON +#endif /* Assembly-only macros */ diff --git a/libc/arch-arm/include/machine/setjmp.h b/libc/arch-arm/include/machine/setjmp.h index f20cab2..0941202 100644 --- a/libc/arch-arm/include/machine/setjmp.h +++ b/libc/arch-arm/include/machine/setjmp.h @@ -1,87 +1,82 @@ -/* $OpenBSD: setjmp.h,v 1.1 2004/02/01 05:09:49 drahn Exp $ */ -/* $NetBSD: setjmp.h,v 1.2 2001/08/25 14:45:59 bjh21 Exp $ */ +/* + * Copyright (C) 2010 The Android Open Source Project + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT + * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ /* * machine/setjmp.h: machine dependent setjmp-related information. */ -#ifdef __ELF__ -#define _JBLEN 64 /* size, in longs, of a jmp_buf */ -#else -#define _JBLEN 29 /* size, in longs, of a jmp_buf */ -#endif +/* _JBLEN is the size of a jmp_buf in longs. + * Do not modify this value or you will break the ABI ! + * + * This value comes from the original OpenBSD ARM-specific header + * that was replaced by this one. + */ +#define _JBLEN 64 -/* - * NOTE: The internal structure of a jmp_buf is *PRIVATE* - * This information is provided as there is software - * that fiddles with this with obtain the stack pointer - * (yes really ! and its commercial !). +/* According to the ARM AAPCS document, we only need to save + * the following registers: * - * Description of the setjmp buffer + * Core r4-r14 * - * word 0 magic number (dependant on creator) - * 1 - 3 f4 fp register 4 - * 4 - 6 f5 fp register 5 - * 7 - 9 f6 fp register 6 - * 10 - 12 f7 fp register 7 - * 13 fpsr fp status register - * 14 r4 register 4 - * 15 r5 register 5 - * 16 r6 register 6 - * 17 r7 register 7 - * 18 r8 register 8 - * 19 r9 register 9 - * 20 r10 register 10 (sl) - * 21 r11 register 11 (fp) - * 22 r12 register 12 (ip) - * 23 r13 register 13 (sp) - * 24 r14 register 14 (lr) - * 25 signal mask (dependant on magic) - * 26 (con't) - * 27 (con't) - * 28 (con't) + * VFP d8-d15 (see section 5.1.2.1) * - * The magic number number identifies the jmp_buf and - * how the buffer was created as well as providing - * a sanity check + * Registers s16-s31 (d8-d15, q4-q7) must be preserved across subroutine + * calls; registers s0-s15 (d0-d7, q0-q3) do not need to be preserved + * (and can be used for passing arguments or returning results in standard + * procedure-call variants). Registers d16-d31 (q8-q15), if present, do + * not need to be preserved. * - * A side note I should mention - Please do not tamper - * with the floating point fields. While they are - * always saved and restored at the moment this cannot - * be garenteed especially if the compiler happens - * to be generating soft-float code so no fp - * registers will be used. + * FPSCR saved because GLibc does saves it too. * - * Whilst this can be seen an encouraging people to - * use the setjmp buffer in this way I think that it - * is for the best then if changes occur compiles will - * break rather than just having new builds falling over - * mysteriously. */ -#define _JB_MAGIC__SETJMP 0x4278f500 -#define _JB_MAGIC_SETJMP 0x4278f501 - -/* Valid for all jmp_buf's */ - -#define _JB_MAGIC 0 -#define _JB_REG_F4 1 -#define _JB_REG_F5 4 -#define _JB_REG_F6 7 -#define _JB_REG_F7 10 -#define _JB_REG_FPSR 13 -#define _JB_REG_R4 14 -#define _JB_REG_R5 15 -#define _JB_REG_R6 16 -#define _JB_REG_R7 17 -#define _JB_REG_R8 18 -#define _JB_REG_R9 19 -#define _JB_REG_R10 20 -#define _JB_REG_R11 21 -#define _JB_REG_R12 22 -#define _JB_REG_R13 23 -#define _JB_REG_R14 24 +/* The internal structure of a jmp_buf is totally private. + * Current layout (may change in the future): + * + * word name description + * 0 magic magic number + * 1 sigmask signal mask (not used with _setjmp / _longjmp) + * 2 float_base base of float registers (d8 to d15) + * 18 float_state floating-point status and control register + * 19 core_base base of core registers (r4 to r14) + * 30 reserved reserved entries (room to grow) + * 64 + * + * NOTE: float_base must be at an even word index, since the + * FP registers will be loaded/stored with instructions + * that expect 8-byte alignment. + */ -/* Only valid with the _JB_MAGIC_SETJMP magic */ +#define _JB_MAGIC 0 +#define _JB_SIGMASK (_JB_MAGIC+1) +#define _JB_FLOAT_BASE (_JB_SIGMASK+1) +#define _JB_FLOAT_STATE (_JB_FLOAT_BASE + (15-8+1)*2) +#define _JB_CORE_BASE (_JB_FLOAT_STATE+1) -#define _JB_SIGMASK 25 +#define _JB_MAGIC__SETJMP 0x4278f500 +#define _JB_MAGIC_SETJMP 0x4278f501 diff --git a/libc/arch-arm/syscalls.mk b/libc/arch-arm/syscalls.mk index 9bfe70a..3d1c2ac 100644 --- a/libc/arch-arm/syscalls.mk +++ b/libc/arch-arm/syscalls.mk @@ -74,7 +74,7 @@ syscall_src += arch-arm/syscalls/fsync.S syscall_src += arch-arm/syscalls/fchown.S syscall_src += arch-arm/syscalls/sync.S syscall_src += arch-arm/syscalls/__fcntl64.S -syscall_src += arch-arm/syscalls/fstatfs.S +syscall_src += arch-arm/syscalls/__fstatfs64.S syscall_src += arch-arm/syscalls/sendfile.S syscall_src += arch-arm/syscalls/fstatat.S syscall_src += arch-arm/syscalls/mkdirat.S @@ -121,13 +121,13 @@ syscall_src += arch-arm/syscalls/__timer_gettime.S syscall_src += arch-arm/syscalls/__timer_getoverrun.S syscall_src += arch-arm/syscalls/__timer_delete.S syscall_src += arch-arm/syscalls/utimes.S +syscall_src += arch-arm/syscalls/sigaction.S syscall_src += arch-arm/syscalls/sigprocmask.S syscall_src += arch-arm/syscalls/__sigsuspend.S syscall_src += arch-arm/syscalls/__rt_sigaction.S syscall_src += arch-arm/syscalls/__rt_sigprocmask.S syscall_src += arch-arm/syscalls/__rt_sigtimedwait.S syscall_src += arch-arm/syscalls/sigpending.S -syscall_src += arch-arm/syscalls/__sigaction.S syscall_src += arch-arm/syscalls/socket.S syscall_src += arch-arm/syscalls/socketpair.S syscall_src += arch-arm/syscalls/bind.S @@ -161,6 +161,7 @@ syscall_src += arch-arm/syscalls/__syslog.S syscall_src += arch-arm/syscalls/init_module.S syscall_src += arch-arm/syscalls/delete_module.S syscall_src += arch-arm/syscalls/klogctl.S +syscall_src += arch-arm/syscalls/sysinfo.S syscall_src += arch-arm/syscalls/futex.S syscall_src += arch-arm/syscalls/epoll_create.S syscall_src += arch-arm/syscalls/epoll_ctl.S diff --git a/libc/arch-arm/syscalls/fstatfs.S b/libc/arch-arm/syscalls/__fstatfs64.S index 88150d6..00b4e41 100644 --- a/libc/arch-arm/syscalls/fstatfs.S +++ b/libc/arch-arm/syscalls/__fstatfs64.S @@ -2,12 +2,12 @@ #include <sys/linux-syscalls.h> .text - .type fstatfs, #function - .globl fstatfs + .type __fstatfs64, #function + .globl __fstatfs64 .align 4 .fnstart -fstatfs: +__fstatfs64: .save {r4, r7} stmfd sp!, {r4, r7} ldr r7, =__NR_fstatfs64 diff --git a/libc/arch-arm/syscalls/__sigaction.S b/libc/arch-arm/syscalls/sigaction.S index aba44b8..2696f1e 100644 --- a/libc/arch-arm/syscalls/__sigaction.S +++ b/libc/arch-arm/syscalls/sigaction.S @@ -2,12 +2,12 @@ #include <sys/linux-syscalls.h> .text - .type __sigaction, #function - .globl __sigaction + .type sigaction, #function + .globl sigaction .align 4 .fnstart -__sigaction: +sigaction: .save {r4, r7} stmfd sp!, {r4, r7} ldr r7, =__NR_sigaction diff --git a/libc/arch-arm/syscalls/sysinfo.S b/libc/arch-arm/syscalls/sysinfo.S new file mode 100644 index 0000000..197324d --- /dev/null +++ b/libc/arch-arm/syscalls/sysinfo.S @@ -0,0 +1,19 @@ +/* autogenerated by gensyscalls.py */ +#include <sys/linux-syscalls.h> + + .text + .type sysinfo, #function + .globl sysinfo + .align 4 + .fnstart + +sysinfo: + .save {r4, r7} + stmfd sp!, {r4, r7} + ldr r7, =__NR_sysinfo + swi #0 + ldmfd sp!, {r4, r7} + movs r0, r0 + bxpl lr + b __set_syscall_errno + .fnend |