diff options
Diffstat (limited to 'libc/arch-mips64/bionic/setjmp.S')
| l---------[-rw-r--r--] | libc/arch-mips64/bionic/setjmp.S | 175 |
1 files changed, 1 insertions, 174 deletions
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S index 31786be..b117bb6 100644..120000 --- a/libc/arch-mips64/bionic/setjmp.S +++ b/libc/arch-mips64/bionic/setjmp.S @@ -1,174 +1 @@ -/* $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */ - -/* - * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com) - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. Neither the name of Opsycon AB nor the names of its contributors - * may be used to endorse or promote products derived from this software - * without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS - * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL - * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS - * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT - * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY - * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - */ - -#include <private/bionic_asm.h> -#include <machine/regnum.h> -#include <machine/signal.h> - -/* - * setjmp, longjmp implementation for libc. this code depends - * on the layout of the struct sigcontext in machine/signal.h. - * - */ - -FRAMESZ= MKFSIZ(2,6) -A1OFF= FRAMESZ-4*REGSZ -A0OFF= FRAMESZ-3*REGSZ -GPOFF= FRAMESZ-2*REGSZ -RAOFF= FRAMESZ-1*REGSZ - -NON_LEAF(setjmp, FRAMESZ, ra) - .mask 0x80000000, RAOFF - PTR_SUBU sp, FRAMESZ # allocate stack frame - SETUP_GP64(GPOFF, setjmp) - SAVE_GP(GPOFF) - .set reorder - REG_S ra, RAOFF(sp) # save state - REG_S a0, A0OFF(sp) - - move a0, zero # get current signal mask - jal sigblock - - REG_L v1, A0OFF(sp) # v1 = jmpbuf - REG_S v0, SC_MASK(v1) # save sc_mask = sigblock(0) - - REG_L a0, A0OFF(sp) # restore jmpbuf - REG_L ra, RAOFF(sp) - REG_S ra, SC_PC(a0) # sc_pc = return address -#if defined(__mips64) - dli v0, 0xACEDBADE # sigcontext magic number -#else - li v0, 0xACEDBADE # sigcontext magic number -#endif - REG_S v0, SC_REGS+ZERO*REGSZ(a0) - REG_S s0, SC_REGS+S0*REGSZ(a0) - REG_S s1, SC_REGS+S1*REGSZ(a0) - REG_S s2, SC_REGS+S2*REGSZ(a0) - REG_S s3, SC_REGS+S3*REGSZ(a0) - REG_S s4, SC_REGS+S4*REGSZ(a0) - REG_S s5, SC_REGS+S5*REGSZ(a0) - REG_S s6, SC_REGS+S6*REGSZ(a0) - REG_S s7, SC_REGS+S7*REGSZ(a0) - REG_S s8, SC_REGS+S8*REGSZ(a0) - REG_L v0, GPOFF(sp) - REG_S v0, SC_REGS+GP*REGSZ(a0) - PTR_ADDU v0, sp, FRAMESZ - REG_S v0, SC_REGS+SP*REGSZ(a0) - -#if !defined(SOFTFLOAT) - li v0, 1 # be nice if we could tell - REG_S v0, SC_FPUSED(a0) # sc_fpused = 1 - cfc1 v0, $31 - s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0) - s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0) - s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0) - s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0) - s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0) - s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0) -#if _MIPS_FPSET == 32 - s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0) - s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0) - s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0) - s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0) - s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0) - s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0) -#endif - REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0) -#endif /* !SOFTFLOAT */ - move v0, zero - RESTORE_GP64 - PTR_ADDU sp, FRAMESZ - j ra - -botch: - jal longjmperror - jal abort - RESTORE_GP64 - PTR_ADDU sp, FRAMESZ -END(setjmp) - - -LEAF(longjmp, FRAMESZ) - PTR_SUBU sp, FRAMESZ - SETUP_GP64(GPOFF, longjmp) - SAVE_GP(GPOFF) - .set reorder - sw a1, A1OFF(sp) - sw a0, A0OFF(sp) - - lw a0, SC_MASK(a0) - jal sigsetmask - - lw a0, A0OFF(sp) - lw a1, A1OFF(sp) - - .set noreorder - REG_L v0, SC_REGS+ZERO*REGSZ(a0) - bne v0, 0xACEDBADE, botch # jump if error - REG_L ra, SC_PC(a0) - REG_L s0, SC_REGS+S0*REGSZ(a0) - REG_L s1, SC_REGS+S1*REGSZ(a0) - REG_L s2, SC_REGS+S2*REGSZ(a0) - REG_L s3, SC_REGS+S3*REGSZ(a0) - REG_L s4, SC_REGS+S4*REGSZ(a0) - REG_L s5, SC_REGS+S5*REGSZ(a0) - REG_L s6, SC_REGS+S6*REGSZ(a0) - REG_L s7, SC_REGS+S7*REGSZ(a0) - REG_L s8, SC_REGS+S8*REGSZ(a0) - REG_L gp, SC_REGS+GP*REGSZ(a0) - REG_L sp, SC_REGS+SP*REGSZ(a0) - -#if !defined(SOFTFLOAT) - REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0) - ctc1 v0, $31 - l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0) - l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0) - l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0) - l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0) - l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0) - l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0) -#if _MIPS_FPSET == 32 - l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0) - l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0) - l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0) - l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0) - l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0) - l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0) -#endif -#endif /* !SOFTFLOAT */ - bne a1, zero, 1f - nop - li a1, 1 # never return 0! -1: - j ra - move v0, a1 - -END(longjmp) +../../arch-mips/bionic/setjmp.S
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