summaryrefslogtreecommitdiffstats
path: root/libc/arch-mips64
diff options
context:
space:
mode:
Diffstat (limited to 'libc/arch-mips64')
-rw-r--r--libc/arch-mips64/bionic/_setjmp.S150
l---------[-rw-r--r--]libc/arch-mips64/bionic/setjmp.S175
-rw-r--r--libc/arch-mips64/bionic/sigsetjmp.S77
l---------libc/arch-mips64/include/machine1
-rw-r--r--libc/arch-mips64/include/machine/asm.h206
-rw-r--r--libc/arch-mips64/include/machine/elf_machdep.h196
-rw-r--r--libc/arch-mips64/include/machine/endian.h66
-rw-r--r--libc/arch-mips64/include/machine/exec.h188
-rw-r--r--libc/arch-mips64/include/machine/regdef.h99
-rw-r--r--libc/arch-mips64/include/machine/regnum.h119
-rw-r--r--libc/arch-mips64/include/machine/setjmp.h10
-rw-r--r--libc/arch-mips64/include/machine/signal.h51
-rw-r--r--libc/arch-mips64/mips64.mk2
13 files changed, 2 insertions, 1338 deletions
diff --git a/libc/arch-mips64/bionic/_setjmp.S b/libc/arch-mips64/bionic/_setjmp.S
deleted file mode 100644
index d237e6d..0000000
--- a/libc/arch-mips64/bionic/_setjmp.S
+++ /dev/null
@@ -1,150 +0,0 @@
-/* $OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/regnum.h>
-#include <machine/signal.h>
-
-/*
- * _setjmp, _longjmp (not restoring signal state)
- *
- * XXX FPSET should probably be taken from SR setting. hmmm...
- * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
- *
- */
-
-FRAMESZ= MKFSIZ(0,4)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(_setjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, _setjmp)
- SAVE_GP(GPOFF)
- .set noreorder
-#if defined(__mips64)
- dli v0, 0xACEDBADE # sigcontext magic number
-#else
- li v0, 0xACEDBADE # sigcontext magic number
-#endif
- REG_S v0, SC_REGS+ZERO*REGSZ(a0)
- REG_S s0, SC_REGS+S0*REGSZ(a0)
- REG_S s1, SC_REGS+S1*REGSZ(a0)
- REG_S s2, SC_REGS+S2*REGSZ(a0)
- REG_S s3, SC_REGS+S3*REGSZ(a0)
- REG_S s4, SC_REGS+S4*REGSZ(a0)
- REG_S s5, SC_REGS+S5*REGSZ(a0)
- REG_S s6, SC_REGS+S6*REGSZ(a0)
- REG_S s7, SC_REGS+S7*REGSZ(a0)
- REG_S s8, SC_REGS+S8*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+GP*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+SP*REGSZ(a0)
- REG_S ra, SC_PC(a0)
-
-#if !defined(SOFTFLOAT)
- li v0, 1 # be nice if we could tell
- REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
- cfc1 v0, $31
- s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
- REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- j ra
- move v0, zero
-END(_setjmp)
-
-LEAF(_longjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, _longjmp)
- SAVE_GP(GPOFF)
- .set noreorder
- REG_L v0, SC_REGS+ZERO*REGSZ(a0)
- bne v0, 0xACEDBADE, botch # jump if error
- REG_L ra, SC_PC(a0)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
- REG_L s0, SC_REGS+S0*REGSZ(a0)
- REG_L s1, SC_REGS+S1*REGSZ(a0)
- REG_L s2, SC_REGS+S2*REGSZ(a0)
- REG_L s3, SC_REGS+S3*REGSZ(a0)
- REG_L s4, SC_REGS+S4*REGSZ(a0)
- REG_L s5, SC_REGS+S5*REGSZ(a0)
- REG_L s6, SC_REGS+S6*REGSZ(a0)
- REG_L s7, SC_REGS+S7*REGSZ(a0)
- REG_L s8, SC_REGS+S8*REGSZ(a0)
- REG_L gp, SC_REGS+GP*REGSZ(a0)
- REG_L sp, SC_REGS+SP*REGSZ(a0)
-#if !defined(SOFTFLOAT)
- ctc1 v0, $31
- l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-#endif /* !SOFTFLOAT */
- bne a1, zero, 1f
- nop
- li a1, 1 # never return 0!
-1:
- j ra
- move v0, a1
-
-botch:
- jal longjmperror
- nop
- jal abort
- nop
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
-END(_longjmp)
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S
index 31786be..b117bb6 100644..120000
--- a/libc/arch-mips64/bionic/setjmp.S
+++ b/libc/arch-mips64/bionic/setjmp.S
@@ -1,174 +1 @@
-/* $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/regnum.h>
-#include <machine/signal.h>
-
-/*
- * setjmp, longjmp implementation for libc. this code depends
- * on the layout of the struct sigcontext in machine/signal.h.
- *
- */
-
-FRAMESZ= MKFSIZ(2,6)
-A1OFF= FRAMESZ-4*REGSZ
-A0OFF= FRAMESZ-3*REGSZ
-GPOFF= FRAMESZ-2*REGSZ
-RAOFF= FRAMESZ-1*REGSZ
-
-NON_LEAF(setjmp, FRAMESZ, ra)
- .mask 0x80000000, RAOFF
- PTR_SUBU sp, FRAMESZ # allocate stack frame
- SETUP_GP64(GPOFF, setjmp)
- SAVE_GP(GPOFF)
- .set reorder
- REG_S ra, RAOFF(sp) # save state
- REG_S a0, A0OFF(sp)
-
- move a0, zero # get current signal mask
- jal sigblock
-
- REG_L v1, A0OFF(sp) # v1 = jmpbuf
- REG_S v0, SC_MASK(v1) # save sc_mask = sigblock(0)
-
- REG_L a0, A0OFF(sp) # restore jmpbuf
- REG_L ra, RAOFF(sp)
- REG_S ra, SC_PC(a0) # sc_pc = return address
-#if defined(__mips64)
- dli v0, 0xACEDBADE # sigcontext magic number
-#else
- li v0, 0xACEDBADE # sigcontext magic number
-#endif
- REG_S v0, SC_REGS+ZERO*REGSZ(a0)
- REG_S s0, SC_REGS+S0*REGSZ(a0)
- REG_S s1, SC_REGS+S1*REGSZ(a0)
- REG_S s2, SC_REGS+S2*REGSZ(a0)
- REG_S s3, SC_REGS+S3*REGSZ(a0)
- REG_S s4, SC_REGS+S4*REGSZ(a0)
- REG_S s5, SC_REGS+S5*REGSZ(a0)
- REG_S s6, SC_REGS+S6*REGSZ(a0)
- REG_S s7, SC_REGS+S7*REGSZ(a0)
- REG_S s8, SC_REGS+S8*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+GP*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+SP*REGSZ(a0)
-
-#if !defined(SOFTFLOAT)
- li v0, 1 # be nice if we could tell
- REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
- cfc1 v0, $31
- s.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- s.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- s.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- s.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- s.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- s.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- s.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- s.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- s.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- s.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- s.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- s.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
- REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
-#endif /* !SOFTFLOAT */
- move v0, zero
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- j ra
-
-botch:
- jal longjmperror
- jal abort
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
-END(setjmp)
-
-
-LEAF(longjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, longjmp)
- SAVE_GP(GPOFF)
- .set reorder
- sw a1, A1OFF(sp)
- sw a0, A0OFF(sp)
-
- lw a0, SC_MASK(a0)
- jal sigsetmask
-
- lw a0, A0OFF(sp)
- lw a1, A1OFF(sp)
-
- .set noreorder
- REG_L v0, SC_REGS+ZERO*REGSZ(a0)
- bne v0, 0xACEDBADE, botch # jump if error
- REG_L ra, SC_PC(a0)
- REG_L s0, SC_REGS+S0*REGSZ(a0)
- REG_L s1, SC_REGS+S1*REGSZ(a0)
- REG_L s2, SC_REGS+S2*REGSZ(a0)
- REG_L s3, SC_REGS+S3*REGSZ(a0)
- REG_L s4, SC_REGS+S4*REGSZ(a0)
- REG_L s5, SC_REGS+S5*REGSZ(a0)
- REG_L s6, SC_REGS+S6*REGSZ(a0)
- REG_L s7, SC_REGS+S7*REGSZ(a0)
- REG_L s8, SC_REGS+S8*REGSZ(a0)
- REG_L gp, SC_REGS+GP*REGSZ(a0)
- REG_L sp, SC_REGS+SP*REGSZ(a0)
-
-#if !defined(SOFTFLOAT)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
- ctc1 v0, $31
- l.d $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
- l.d $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
- l.d $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
- l.d $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
- l.d $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
- l.d $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
-#if _MIPS_FPSET == 32
- l.d $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
- l.d $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
- l.d $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
- l.d $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
- l.d $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
- l.d $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
-#endif
-#endif /* !SOFTFLOAT */
- bne a1, zero, 1f
- nop
- li a1, 1 # never return 0!
-1:
- j ra
- move v0, a1
-
-END(longjmp)
+../../arch-mips/bionic/setjmp.S \ No newline at end of file
diff --git a/libc/arch-mips64/bionic/sigsetjmp.S b/libc/arch-mips64/bionic/sigsetjmp.S
deleted file mode 100644
index 9d2e5ea..0000000
--- a/libc/arch-mips64/bionic/sigsetjmp.S
+++ /dev/null
@@ -1,77 +0,0 @@
-/* $OpenBSD: sigsetjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-/*-
- * Copyright (c) 1991, 1993, 1995,
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Havard Eidnes.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <machine/regnum.h>
-#include <machine/setjmp.h>
-
-/*
- * trampolines for sigsetjmp and siglongjmp save and restore mask.
- *
- */
-FRAMESZ= MKFSIZ(1,1)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(sigsetjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, sigsetjmp)
- .set reorder
- REG_S a1, (_JBLEN*REGSZ)(a0) # save "savemask"
- bne a1, 0x0, 1f # do saving of signal mask?
- LA t9, _setjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-
-1: LA t9, setjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-END(sigsetjmp)
-
-LEAF(siglongjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, siglongjmp)
- .set reorder
- REG_L t0, (_JBLEN*REGSZ)(a0) # get "savemask"
- bne t0, 0x0, 1f # restore signal mask?
- LA t9, _longjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-1:
- LA t9, longjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-END(siglongjmp)
diff --git a/libc/arch-mips64/include/machine b/libc/arch-mips64/include/machine
new file mode 120000
index 0000000..36466ee
--- /dev/null
+++ b/libc/arch-mips64/include/machine
@@ -0,0 +1 @@
+../../arch-mips/include/machine \ No newline at end of file
diff --git a/libc/arch-mips64/include/machine/asm.h b/libc/arch-mips64/include/machine/asm.h
deleted file mode 100644
index cdc7914..0000000
--- a/libc/arch-mips64/include/machine/asm.h
+++ /dev/null
@@ -1,206 +0,0 @@
-/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#ifndef _MIPS64_ASM_H
-#define _MIPS64_ASM_H
-
-#define __bionic_asm_align 4
-
-#undef __bionic_asm_custom_entry
-#undef __bionic_asm_custom_end
-#define __bionic_asm_custom_entry(f) .ent f
-#define __bionic_asm_custom_end(f) .end f
-
-#include <machine/regdef.h>
-
-#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */
-#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */
-#define _MIPS_ISA_MIPS3 3 /* R4000 */
-#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */
-#define _MIPS_ISA_MIPS5 5
-#define _MIPS_ISA_MIPS32 6
-#define _MIPS_ISA_MIPS64 7
-
-#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
-#define ABICALLS .abicalls
-#endif
-
-#if defined(ABICALLS) && !defined(_KERNEL)
- ABICALLS
-#endif
-
-#if !defined(__MIPSEL__) && !defined(__MIPSEB__)
-#error "__MIPSEL__ or __MIPSEB__ must be defined"
-#endif
-/*
- * Define how to access unaligned data word
- */
-#if defined(__MIPSEL__)
-#define LWLO lwl
-#define LWHI lwr
-#define SWLO swl
-#define SWHI swr
-#define LDLO ldl
-#define LDHI ldr
-#define SDLO sdl
-#define SDHI sdr
-#endif
-#if defined(__MIPSEB__)
-#define LWLO lwr
-#define LWHI lwl
-#define SWLO swr
-#define SWHI swl
-#define LDLO ldr
-#define LDHI ldl
-#define SDLO sdr
-#define SDHI sdl
-#endif
-
-/*
- * Define programming environment for ABI.
- */
-#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
-
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
-#define NARGSAVE 4
-
-#define SETUP_GP \
- .set noreorder; \
- .cpload t9; \
- .set reorder;
-
-#define SAVE_GP(x) \
- .cprestore x
-
-#define SETUP_GP64(gpoff, name)
-#define RESTORE_GP64
-#endif
-
-#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
-#define NARGSAVE 0
-
-#define SETUP_GP
-#define SAVE_GP(x)
-#define SETUP_GP64(gpoff, name) \
- .cpsetup t9, gpoff, name
-#define RESTORE_GP64 \
- .cpreturn
-#endif
-
-#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
-
-#else /* defined(ABICALLS) && !defined(_KERNEL) */
-
-#define NARGSAVE 4
-#define SETUP_GP
-#define SAVE_GP(x)
-
-#define ALIGNSZ 16 /* Stack layout alignment */
-#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
-
-#endif
-
-/*
- * Basic register operations based on selected ISA
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
-#define REGSZ 4 /* 32 bit mode register size */
-#define LOGREGSZ 2 /* log rsize */
-#define REG_S sw
-#define REG_L lw
-#define CF_SZ 24 /* Call frame size */
-#define CF_ARGSZ 16 /* Call frame arg size */
-#define CF_RA_OFFS 20 /* Call ra save offset */
-#endif
-
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
-#define REGSZ 8 /* 64 bit mode register size */
-#define LOGREGSZ 3 /* log rsize */
-#define REG_S sd
-#define REG_L ld
-#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */
-#define CF_ARGSZ 32 /* Call frame arg size */
-#define CF_RA_OFFS 40 /* Call ra save offset */
-#endif
-
-#define REGSZ_FP 8 /* 64 bit FP register size */
-
-#ifndef __LP64__
-#define PTR_L lw
-#define PTR_S sw
-#define PTR_SUB sub
-#define PTR_ADD add
-#define PTR_SUBU subu
-#define PTR_ADDU addu
-#define LI li
-#define LA la
-#define PTR_SLL sll
-#define PTR_SRL srl
-#define PTR_VAL .word
-#else
-#define PTR_L ld
-#define PTR_S sd
-#define PTR_ADD dadd
-#define PTR_SUB dsub
-#define PTR_SUBU dsubu
-#define PTR_ADDU daddu
-#define LI dli
-#define LA dla
-#define PTR_SLL dsll
-#define PTR_SRL dsrl
-#define PTR_VAL .dword
-#endif
-
-/*
- * LEAF(x, fsize)
- *
- * Declare a leaf routine.
- */
-#define LEAF(x, fsize) \
- .align 3; \
- .globl x; \
- .ent x, 0; \
-x: ; \
- .cfi_startproc; \
- .frame sp, fsize, ra; \
- SETUP_GP \
-
-/*
- * NON_LEAF(x)
- *
- * Declare a non-leaf routine (a routine that makes other C calls).
- */
-#define NON_LEAF(x, fsize, retpc) \
- .align 3; \
- .globl x; \
- .ent x, 0; \
-x: ; \
- .cfi_startproc; \
- .frame sp, fsize, retpc; \
- SETUP_GP \
-
-#endif /* !_MIPS_ASM_H */
diff --git a/libc/arch-mips64/include/machine/elf_machdep.h b/libc/arch-mips64/include/machine/elf_machdep.h
deleted file mode 100644
index d27d431..0000000
--- a/libc/arch-mips64/include/machine/elf_machdep.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/* $NetBSD: elf_machdep.h,v 1.15 2011/03/15 07:39:22 matt Exp $ */
-
-#ifndef _MIPS_ELF_MACHDEP_H_
-#define _MIPS_ELF_MACHDEP_H_
-
-#ifdef _LP64
-#define ARCH_ELFSIZE 64 /* MD native binary size */
-#else
-#define ARCH_ELFSIZE 32 /* MD native binary size */
-#endif
-
-#if ELFSIZE == 32
-#define ELF32_MACHDEP_ID_CASES \
- case EM_MIPS: \
- break;
-
-#define ELF32_MACHDEP_ID EM_MIPS
-#elif ELFSIZE == 64
-#define ELF64_MACHDEP_ID_CASES \
- case EM_MIPS: \
- break;
-
-#define ELF64_MACHDEP_ID EM_MIPS
-#endif
-
-/* mips relocs. */
-
-#define R_MIPS_NONE 0
-#define R_MIPS_16 1
-#define R_MIPS_32 2
-#define R_MIPS_REL32 3
-#define R_MIPS_REL R_MIPS_REL32
-#define R_MIPS_26 4
-#define R_MIPS_HI16 5 /* high 16 bits of symbol value */
-#define R_MIPS_LO16 6 /* low 16 bits of symbol value */
-#define R_MIPS_GPREL16 7 /* GP-relative reference */
-#define R_MIPS_LITERAL 8 /* Reference to literal section */
-#define R_MIPS_GOT16 9 /* Reference to global offset table */
-#define R_MIPS_GOT R_MIPS_GOT16
-#define R_MIPS_PC16 10 /* 16 bit PC relative reference */
-#define R_MIPS_CALL16 11 /* 16 bit call thru glbl offset tbl */
-#define R_MIPS_CALL R_MIPS_CALL16
-#define R_MIPS_GPREL32 12
-
-/* 13, 14, 15 are not defined at this point. */
-#define R_MIPS_UNUSED1 13
-#define R_MIPS_UNUSED2 14
-#define R_MIPS_UNUSED3 15
-
-/*
- * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
- */
-#define R_MIPS_SHIFT5 16
-#define R_MIPS_SHIFT6 17
-
-#define R_MIPS_64 18
-#define R_MIPS_GOT_DISP 19
-#define R_MIPS_GOT_PAGE 20
-#define R_MIPS_GOT_OFST 21
-#define R_MIPS_GOT_HI16 22
-#define R_MIPS_GOT_LO16 23
-#define R_MIPS_SUB 24
-#define R_MIPS_INSERT_A 25
-#define R_MIPS_INSERT_B 26
-#define R_MIPS_DELETE 27
-#define R_MIPS_HIGHER 28
-#define R_MIPS_HIGHEST 29
-#define R_MIPS_CALL_HI16 30
-#define R_MIPS_CALL_LO16 31
-#define R_MIPS_SCN_DISP 32
-#define R_MIPS_REL16 33
-#define R_MIPS_ADD_IMMEDIATE 34
-#define R_MIPS_PJUMP 35
-#define R_MIPS_RELGOT 36
-#define R_MIPS_JALR 37
-/* TLS relocations */
-
-#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
-#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
-#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
-#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
-#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
-#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
-#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
-#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
-#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
-#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
-#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
-#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
-#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
-
-#define R_MIPS_max 51
-
-#define R_TYPE(name) __CONCAT(R_MIPS_,name)
-
-#define R_MIPS16_min 100
-#define R_MIPS16_26 100
-#define R_MIPS16_GPREL 101
-#define R_MIPS16_GOT16 102
-#define R_MIPS16_CALL16 103
-#define R_MIPS16_HI16 104
-#define R_MIPS16_LO16 105
-#define R_MIPS16_max 106
-
-
-/* mips dynamic tags */
-
-#define DT_MIPS_RLD_VERSION 0x70000001
-#define DT_MIPS_TIME_STAMP 0x70000002
-#define DT_MIPS_ICHECKSUM 0x70000003
-#define DT_MIPS_IVERSION 0x70000004
-#define DT_MIPS_FLAGS 0x70000005
-#define DT_MIPS_BASE_ADDRESS 0x70000006
-#define DT_MIPS_CONFLICT 0x70000008
-#define DT_MIPS_LIBLIST 0x70000009
-#define DT_MIPS_CONFLICTNO 0x7000000b
-#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* number of local got ents */
-#define DT_MIPS_LIBLISTNO 0x70000010
-#define DT_MIPS_SYMTABNO 0x70000011 /* number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO 0x70000012
-#define DT_MIPS_GOTSYM 0x70000013 /* first dynamic sym in got */
-#define DT_MIPS_HIPAGENO 0x70000014
-#define DT_MIPS_RLD_MAP 0x70000016 /* address of loader map */
-
-/*
- * ELF Flags
- */
-#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */
-#define EF_MIPS_CPIC 0x00000004 /* STD PIC calling sequence */
-#define EF_MIPS_ABI2 0x00000020 /* N32 */
-
-#define EF_MIPS_ARCH_ASE 0x0f000000 /* Architectural extensions */
-#define EF_MIPS_ARCH_MDMX 0x08000000 /* MDMX multimedia extension */
-#define EF_MIPS_ARCH_M16 0x04000000 /* MIPS-16 ISA extensions */
-
-#define EF_MIPS_ARCH 0xf0000000 /* Architecture field */
-#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code */
-#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code */
-#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code */
-#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code */
-#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code */
-#define EF_MIPS_ARCH_32 0x50000000 /* -mips32 code */
-#define EF_MIPS_ARCH_64 0x60000000 /* -mips64 code */
-#define EF_MIPS_ARCH_32R2 0x70000000 /* -mips32r2 code */
-#define EF_MIPS_ARCH_64R2 0x80000000 /* -mips64r2 code */
-
-#define EF_MIPS_ABI 0x0000f000
-#define EF_MIPS_ABI_O32 0x00001000
-#define EF_MIPS_ABI_O64 0x00002000
-#define EF_MIPS_ABI_EABI32 0x00003000
-#define EF_MIPS_ABI_EABI64 0x00004000
-
-#if defined(__MIPSEB__)
-#define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB
-#define ELF64_MACHDEP_ENDIANNESS ELFDATA2MSB
-#elif defined(__MIPSEL__)
-#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB
-#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB
-#elif !defined(HAVE_NBTOOL_CONFIG_H)
-#error neither __MIPSEL__ nor __MIPSEB__ are defined.
-#endif
-
-#ifdef _KERNEL
-#ifdef _KERNEL_OPT
-#include "opt_compat_netbsd.h"
-#endif
-#ifdef COMPAT_16
-/*
- * Up to 1.6, the ELF dynamic loader (ld.elf_so) was not relocatable.
- * Tell the kernel ELF exec code not to try relocating the interpreter
- * for dynamically-linked ELF binaries.
- */
-#define ELF_INTERP_NON_RELOCATABLE
-#endif /* COMPAT_16 */
-
-/*
- * We need to be able to include the ELF header so we can pick out the
- * ABI being used.
- */
-#ifdef ELFSIZE
-#define ELF_MD_PROBE_FUNC ELFNAME2(mips_netbsd,probe)
-#define ELF_MD_COREDUMP_SETUP ELFNAME2(coredump,setup)
-#endif
-
-struct exec_package;
-
-int mips_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
- vaddr_t *);
-void coredump_elf32_setup(struct lwp *, void *);
-
-int mips_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
- vaddr_t *);
-void coredump_elf64_setup(struct lwp *, void *);
-#endif /* _KERNEL */
-
-#endif /* _MIPS_ELF_MACHDEP_H_ */
diff --git a/libc/arch-mips64/include/machine/endian.h b/libc/arch-mips64/include/machine/endian.h
deleted file mode 100644
index 9270e9d..0000000
--- a/libc/arch-mips64/include/machine/endian.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_ENDIAN_H_
-#define _MIPS64_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-#define __swap16md(x) ({ \
- register uint16_t _x = (x); \
- register uint16_t _r; \
- __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \
- _r; \
-})
-
-#define __swap32md(x) ({ \
- register uint32_t _x = (x); \
- register uint32_t _r; \
- __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
- _r; \
-})
-
-#define __swap64md(x) ({ \
- uint64_t _swap64md_x = (x); \
- (uint64_t) __swap32md(_swap64md_x >> 32) | \
- (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros. */
-#define MD_SWAP
-
-#endif /* __mips32r2__ */
-#endif /* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MIPS64_ENDIAN_H_ */
diff --git a/libc/arch-mips64/include/machine/exec.h b/libc/arch-mips64/include/machine/exec.h
deleted file mode 100644
index 3c63f74..0000000
--- a/libc/arch-mips64/include/machine/exec.h
+++ /dev/null
@@ -1,188 +0,0 @@
-/* $OpenBSD: exec.h,v 1.1 2004/10/18 19:05:36 grange Exp $ */
-
-/*
- * Copyright (c) 1996-2004 Per Fogelstrom, Opsycon AB
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_EXEC_H_
-#define _MIPS64_EXEC_H_
-
-#define __LDPGSZ 4096
-
-/*
- * Define what exec "formats" we should handle.
- */
-#define NATIVE_EXEC_ELF
-#define NATIVE_ELFSIZE 64
-#define EXEC_SCRIPT
-
-/*
- * If included from sys/exec.h define kernels ELF format.
- */
-#ifdef __LP64__
-#define ARCH_ELFSIZE 64
-#define DB_ELFSIZE 64
-#define ELF_TARG_CLASS ELFCLASS64
-#else
-#define ARCH_ELFSIZE 32
-#define DB_ELFSIZE 32
-#define ELF_TARG_CLASS ELFCLASS32
-#endif
-
-#if defined(__MIPSEB__)
-#define ELF_TARG_DATA ELFDATA2MSB
-#else
-#define ELF_TARG_DATA ELFDATA2LSB
-#endif
-#define ELF_TARG_MACH EM_MIPS
-
-#define _NLIST_DO_ELF
-
-#if defined(_LP64)
-#define _KERN_DO_ELF64
-#if defined(COMPAT_O32)
-#define _KERN_DO_ELF
-#endif
-#else
-#define _KERN_DO_ELF
-#endif
-
-/* Information taken from MIPS ABI supplemental */
-
-/* Architecture dependent Segment types - p_type */
-#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */
-
-/* Architecture dependent d_tag field for Elf32_Dyn. */
-#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime Linker Interface ID */
-#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */
-#define DT_MIPS_ICHECKSUM 0x70000003 /* Cksum of ext. str. and com. sizes */
-#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */
-#define DT_MIPS_FLAGS 0x70000005 /* Flags */
-#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */
-#define DT_MIPS_CONFLICT 0x70000008 /* Adr of .conflict section */
-#define DT_MIPS_LIBLIST 0x70000009 /* Address of .liblist section */
-#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local .GOT entries */
-#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of .conflict entries */
-#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of .liblist entries */
-#define DT_MIPS_SYMTABNO 0x70000011 /* Number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */
-#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in .dynsym */
-#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */
-#define DT_MIPS_RLD_MAP 0x70000016 /* Address of debug map pointer */
-
-#define DT_PROCNUM (DT_MIPS_RLD_MAP - DT_LOPROC + 1)
-
-/*
- * Legal values for e_flags field of Elf32_Ehdr.
- */
-#define EF_MIPS_NOREORDER 0x00000001 /* .noreorder was used */
-#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */
-#define EF_MIPS_CPIC 0x00000004 /* Uses PIC calling sequence */
-#define EF_MIPS_ABI2 0x00000020 /* -n32 on Irix 6 */
-#define EF_MIPS_32BITMODE 0x00000100 /* 64 bit in 32 bit mode... */
-#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */
-#define E_MIPS_ARCH_1 0x00000000
-#define E_MIPS_ARCH_2 0x10000000
-#define E_MIPS_ARCH_3 0x20000000
-#define E_MIPS_ARCH_4 0x30000000
-#define EF_MIPS_ABI 0x0000f000 /* ABI level */
-#define E_MIPS_ABI_NONE 0x00000000 /* ABI level not set */
-#define E_MIPS_ABI_O32 0x00001000
-#define E_MIPS_ABI_O64 0x00002000
-#define E_MIPS_ABI_EABI32 0x00004000
-#define E_MIPS_ABI_EABI64 0x00004000
-
-/*
- * Mips special sections.
- */
-#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */
-#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
-#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
-
-/*
- * Legal values for sh_type field of Elf32_Shdr.
- */
-#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */
-#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */
-#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */
-#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */
-#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information */
-#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */
-
-/*
- * Legal values for sh_flags field of Elf32_Shdr.
- */
-#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */
-
-#if 0
-/*
- * Entries found in sections of type SHT_MIPS_GPTAB.
- */
-typedef union {
- struct {
- Elf32_Word gt_current_g_value; /* -G val used in compilation */
- Elf32_Word gt_unused; /* Not used */
- } gt_header; /* First entry in section */
- struct {
- Elf32_Word gt_g_value; /* If this val were used for -G */
- Elf32_Word gt_bytes; /* This many bytes would be used */
- } gt_entry; /* Subsequent entries in section */
-} Elf32_gptab;
-
-/*
- * Entry found in sections of type SHT_MIPS_REGINFO.
- */
-typedef struct {
- Elf32_Word ri_gprmask; /* General registers used */
- Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */
- Elf32_Sword ri_gp_value; /* $gp register value */
-} Elf32_RegInfo;
-#endif
-
-
-/*
- * Mips relocations.
- */
-
-#define R_MIPS_NONE 0 /* No reloc */
-#define R_MIPS_16 1 /* Direct 16 bit */
-#define R_MIPS_32 2 /* Direct 32 bit */
-#define R_MIPS_REL32 3 /* PC relative 32 bit */
-#define R_MIPS_26 4 /* Direct 26 bit shifted */
-#define R_MIPS_HI16 5 /* High 16 bit */
-#define R_MIPS_LO16 6 /* Low 16 bit */
-#define R_MIPS_GPREL16 7 /* GP relative 16 bit */
-#define R_MIPS_LITERAL 8 /* 16 bit literal entry */
-#define R_MIPS_GOT16 9 /* 16 bit GOT entry */
-#define R_MIPS_PC16 10 /* PC relative 16 bit */
-#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */
-#define R_MIPS_GPREL32 12 /* GP relative 32 bit */
-
-#define R_MIPS_64 18
-
-#define R_MIPS_REL32_64 ((R_MIPS_64 << 8) | R_MIPS_REL32)
-
-
-#endif /* !_MIPS64_EXEC_H_ */
diff --git a/libc/arch-mips64/include/machine/regdef.h b/libc/arch-mips64/include/machine/regdef.h
deleted file mode 100644
index 3a7cd68..0000000
--- a/libc/arch-mips64/include/machine/regdef.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* $OpenBSD: regdef.h,v 1.3 2005/08/07 07:29:44 miod Exp $ */
-
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell. This file is derived from the MIPS RISC
- * Architecture book by Gerry Kane.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)regdef.h 8.1 (Berkeley) 6/10/93
- */
-#ifndef _MIPS_REGDEF_H_
-#define _MIPS_REGDEF_H_
-
-#if (_MIPS_SIM == _ABI64) && !defined(__mips_n64)
-#define __mips_n64 1
-#endif
-#if (_MIPS_SIM == _ABIN32) && !defined(__mips_n32)
-#define __mips_n32 1
-#endif
-
-#define zero $0 /* always zero */
-#define AT $at /* assembler temp */
-#define v0 $2 /* return value */
-#define v1 $3
-#define a0 $4 /* argument registers */
-#define a1 $5
-#define a2 $6
-#define a3 $7
-#if defined(__mips_n32) || defined(__mips_n64)
-#define a4 $8 /* expanded register arguments */
-#define a5 $9
-#define a6 $10
-#define a7 $11
-#define ta0 $8 /* alias */
-#define ta1 $9
-#define ta2 $10
-#define ta3 $11
-#define t0 $12 /* temp registers (not saved across subroutine calls) */
-#define t1 $13
-#define t2 $14
-#define t3 $15
-#else
-#define t0 $8 /* temp registers (not saved across subroutine calls) */
-#define t1 $9
-#define t2 $10
-#define t3 $11
-#define t4 $12
-#define t5 $13
-#define t6 $14
-#define t7 $15
-#define ta0 $12 /* alias */
-#define ta1 $13
-#define ta2 $14
-#define ta3 $15
-#endif
-#define s0 $16 /* saved across subroutine calls (callee saved) */
-#define s1 $17
-#define s2 $18
-#define s3 $19
-#define s4 $20
-#define s5 $21
-#define s6 $22
-#define s7 $23
-#define t8 $24 /* two more temp registers */
-#define t9 $25
-#define k0 $26 /* kernel temporary */
-#define k1 $27
-#define gp $28 /* global pointer */
-#define sp $29 /* stack pointer */
-#define s8 $30 /* one more callee saved */
-#define ra $31 /* return address */
-
-#endif /* !_MIPS_REGDEF_H_ */
diff --git a/libc/arch-mips64/include/machine/regnum.h b/libc/arch-mips64/include/machine/regnum.h
deleted file mode 100644
index bfe1280..0000000
--- a/libc/arch-mips64/include/machine/regnum.h
+++ /dev/null
@@ -1,119 +0,0 @@
-/* $OpenBSD: regnum.h,v 1.3 2004/08/10 20:28:13 deraadt Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_REGNUM_H_
-#define _MIPS64_REGNUM_H_
-
-/*
- * Location of the saved registers relative to ZERO.
- * Usage is p->p_regs[XX].
- */
-#define ZERO 0
-#define AST 1
-#define V0 2
-#define V1 3
-#define A0 4
-#define A1 5
-#define A2 6
-#define A3 7
-#define T0 8
-#define T1 9
-#define T2 10
-#define T3 11
-#define T4 12
-#define T5 13
-#define T6 14
-#define T7 15
-#define S0 16
-#define S1 17
-#define S2 18
-#define S3 19
-#define S4 20
-#define S5 21
-#define S6 22
-#define S7 23
-#define T8 24
-#define T9 25
-#define K0 26
-#define K1 27
-#define GP 28
-#define SP 29
-#define S8 30
-#define RA 31
-#define SR 32
-#define PS SR /* alias for SR */
-#define MULLO 33
-#define MULHI 34
-#define BADVADDR 35
-#define CAUSE 36
-#define PC 37
-#define IC 38
-#define CPL 39
-
-#define NUMSAVEREGS 40 /* Number of registers saved in trap */
-
-#define FPBASE NUMSAVEREGS
-#define F0 (FPBASE+0)
-#define F1 (FPBASE+1)
-#define F2 (FPBASE+2)
-#define F3 (FPBASE+3)
-#define F4 (FPBASE+4)
-#define F5 (FPBASE+5)
-#define F6 (FPBASE+6)
-#define F7 (FPBASE+7)
-#define F8 (FPBASE+8)
-#define F9 (FPBASE+9)
-#define F10 (FPBASE+10)
-#define F11 (FPBASE+11)
-#define F12 (FPBASE+12)
-#define F13 (FPBASE+13)
-#define F14 (FPBASE+14)
-#define F15 (FPBASE+15)
-#define F16 (FPBASE+16)
-#define F17 (FPBASE+17)
-#define F18 (FPBASE+18)
-#define F19 (FPBASE+19)
-#define F20 (FPBASE+20)
-#define F21 (FPBASE+21)
-#define F22 (FPBASE+22)
-#define F23 (FPBASE+23)
-#define F24 (FPBASE+24)
-#define F25 (FPBASE+25)
-#define F26 (FPBASE+26)
-#define F27 (FPBASE+27)
-#define F28 (FPBASE+28)
-#define F29 (FPBASE+29)
-#define F30 (FPBASE+30)
-#define F31 (FPBASE+31)
-#define FSR (FPBASE+32)
-
-#define NUMFPREGS 33
-
-#define NREGS (NUMSAVEREGS + NUMFPREGS)
-
-#endif /* !_MIPS64_REGNUM_H_ */
diff --git a/libc/arch-mips64/include/machine/setjmp.h b/libc/arch-mips64/include/machine/setjmp.h
deleted file mode 100644
index 55ba7be..0000000
--- a/libc/arch-mips64/include/machine/setjmp.h
+++ /dev/null
@@ -1,10 +0,0 @@
-/* $OpenBSD: setjmp.h,v 1.2 2004/08/10 21:10:56 pefo Exp $ */
-
-/* Public domain */
-
-#ifndef _MIPS_SETJMP_H_
-#define _MIPS_SETJMP_H_
-
-#define _JBLEN 157 /* size, in longs, of a jmp_buf */
-
-#endif /* !_MIPS_SETJMP_H_ */
diff --git a/libc/arch-mips64/include/machine/signal.h b/libc/arch-mips64/include/machine/signal.h
deleted file mode 100644
index b31715c..0000000
--- a/libc/arch-mips64/include/machine/signal.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/* $OpenBSD: signal.h,v 1.8 2006/01/09 18:18:37 millert Exp $ */
-
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)signal.h 8.1 (Berkeley) 6/10/93
- */
-
-#ifndef _MIPS_SIGNAL_H_
-#define _MIPS_SIGNAL_H_
-
-#define SC_REGMASK (0*REGSZ)
-#define SC_STATUS (1*REGSZ)
-#define SC_PC (2*REGSZ)
-#define SC_REGS (SC_PC+8)
-#define SC_FPREGS (SC_REGS+32*8)
-#define SC_ACX (SC_FPREGS+32*REGSZ_FP)
-#define SC_USED_MATH (SC_ACX+3*REGSZ)
-/* OpenBSD compatibility */
-#define SC_MASK SC_REGMASK
-#define SC_FPUSED SC_USED_MATH
-
-#endif /* !_MIPS_SIGNAL_H_ */
diff --git a/libc/arch-mips64/mips64.mk b/libc/arch-mips64/mips64.mk
index b962283..6fa7d33 100644
--- a/libc/arch-mips64/mips64.mk
+++ b/libc/arch-mips64/mips64.mk
@@ -49,9 +49,7 @@ libc_openbsd_src_files_mips64 += \
libc_bionic_src_files_mips64 += \
arch-mips64/bionic/__bionic_clone.S \
arch-mips64/bionic/_exit_with_stack_teardown.S \
- arch-mips64/bionic/_setjmp.S \
arch-mips64/bionic/setjmp.S \
- arch-mips64/bionic/sigsetjmp.S \
arch-mips64/bionic/syscall.S \
arch-mips64/bionic/vfork.S \
generated by cgit v1.1 at 2025-03-12 05:08:29 +0000