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* | | | | | | | linker: Don't try to walk the g_active_shim_libs when doing dlsymChristopher R. Palmer2015-12-011-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a bug in the original shim_lib implementation which was doing the shim lib resolution both when loading the libraries and when doing the dynamic symbol resolution. Change-Id: Ib2df0498cf551b3bbd37d7c351410b9908eb1795
* | | | | | | | kernel-header : add alarm type and clock type for power off alarmMao Jinlong2015-12-012-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use dedicated alarm type and clock type for poweroff alarm. Change-Id: I937730994c6690b21868745e192d8c12ab818776
* | | | | | | | Revert "linker: Reset the active shim libs each time we do a dlopen"Ethan Chen2015-11-301-8/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This reverts commit ad21814c21f40f0e0a4f62e03619e274de9f6983. Change-Id: I205bcbaae6c1494601f9245fe360a088d5b745e9
* | | | | | | | linker: Reset the active shim libs each time we do a dlopenChristopher R. Palmer2015-11-291-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We use the active libs to avoid recursively trying to load the same library: A -> shimlibs add B -> depends on A -> shimlibs add B -> ... However, when we repeatedly dlopen the same library we need to reset the active shim libs to avoid failing to add B the second time we dlopen A. Change-Id: I27580e3d6a53858e8bca025d6c85f981cffbea06
* | | | | | | | libc: Add memchr to a53+a57 targetSteve Kondik2015-11-241-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change-Id: I3991c06dd4813c7cc73d50b56fd7974116d79892
* | | | | | | | libc: AArch64: Tune memcpyWilco Dijkstra2015-11-191-24/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Further tuning for performance. Change-Id: Id08eaab885f9743fa7575077924a947c1b88e4ff
* | | | | | | | libc: include strrchr for kryo and denver64HashBang2015-11-182-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change-Id: Iee9a0bf55279f80475db67a70ad5b4b205450298
* | | | | | | | linker: Fix the fact that shim libs do not properly call constructorsChristopher R. Palmer2015-11-151-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change-Id: I34333e13443a154e675b853fa41442351bc4243a
* | | | | | | | Fix regoff_t for LP32 and _FILE_OFFSET_BITS=64.Elliott Hughes2015-11-072-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bionic is built without _FILE_OFFSET_BITS=64, so internally regoff_t was 32-bit on LP32, but code compiled with _FILE_OFFSET_BITS would expect rm_so and rm_eo in struct regmatch_t to be 64-bit, leading to confusion. Bug: http://b/23566443 Change-Id: Iae92fa545104068e4f64ce1977f5ec616859638c
* | | | | | | | libc: ARM64: add assembly strrchrRichard Earnshaw2015-11-073-1/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change-Id: I59a0aa618bf8139dc0368af9ddf881eba5d3eadf
* | | | | | | | libc: ARM64: improve performance in strlenWilco Dijkstra2015-11-071-71/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change-Id: Ic20f93a0052a49bd76cd6795f51e8606ccfbf11c
* | | | | | | | libc: ARM64: optimize memset.Wilco Dijkstra2015-11-071-190/+186
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an optimized memset for AArch64. Memset is split into 4 main cases: small sets of up to 16 bytes, medium of 16..96 bytes which are fully unrolled. Large memsets of more than 96 bytes align the destination and use an unrolled loop processing 64 bytes per iteration. Memsets of zero of more than 256 use the dc zva instruction, and there are faster versions for the common ZVA sizes 64 or 128. STP of Q registers is used to reduce codesize without loss of performance. Change-Id: I0c5b5ec5ab8a1fd0f23eee8fbacada0be08e841f
* | | | | | | | libc: ARM64: Optimize memcpy.Wilco Dijkstra2015-11-071-133/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an optimized memcpy for AArch64. Copies are split into 3 main cases: small copies of up to 16 bytes, medium copies of 17..96 bytes which are fully unrolled. Large copies of more than 96 bytes align the destination and use an unrolled loop processing 64 bytes per iteration. In order to share code with memmove, small and medium copies read all data before writing, allowing any kind of overlap. On a random copy test memcpy is 40.8% faster on A57 and 28.4% on A53. Change-Id: Ibb9483e45bbc0e8ca3d5ce98a31c55dfd8a5ac28
* | | | | | | | libc: ARM64: optimize memmoveWilco Dijkstra2015-11-071-281/+105
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is an optimized memmove for AArch64. All copies of up to 96 bytes and all backward copies are done by the new memcpy. The only remaining case is large forward copies which are done in the same way as the memcpy loop, but copying from the end rather than the start. Change-Id: I635bd2798a755256f748b2af19b1a56fb85a40c6
* | | | | | | | libc: ARM64: remove bcopy from memsetJake Weinstein2015-11-071-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Deprecated by ce9ce28e5d760e32ab6c894dfaf7b8dad6de7ff6 * Already removed from Denver memset Change-Id: I7beda29a799c7fa11f5a239d78626f4da1b581a2
* | | | | | | | libc: remove bcopy from memmove on 64-bit architecturesJake Weinstein2015-11-072-17/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * bcopy is deprecated on LP64 by the following commit: https://android.googlesource.com/platform/bionic/+/ce9ce28e5d760e32ab6c894dfaf7b8dad6de7ff6 Change-Id: I6849916f0ec4a2d0db9a360999ad1dc8edda952b
* | | | | | | | Fix arm64 fenv warnings, and make warnings errors.Christopher Ferris2015-11-072-4/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the control registers being read/written in fenv.c only have 32 bits that are used, the instructions take a 64 bit register. Make sure the inline assembler in the macros use 64 bit values. Verified that before the change and after the change, the disassembly is exactly the same. In addition, add -Werror to the cflags. Change-Id: I6603779327488c23e3aab13300edf2e02b101916
* | | | | | | | Sync with upstream FreeBSD libm.Elliott Hughes2015-11-0731-377/+406
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change-Id: I97e9b23903f1d993d84825806065e85626007d31
* | | | | | | | Revert "Revert "Use compiler builtins for fabs.""Elliott Hughes2015-11-077-68/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't enable the inlines when building libm itself. Otherwise clang gets upset by seeing both an inline and a non-inline definition. This reverts commit c5deb0f883cbdca7e5ab75f92f82c31d21367f49. Change-Id: If7abdb351f5a5549d6a331b33af408e8fcfa9868
* | | | | | | | Use __builtin_* in <math.h>.Elliott Hughes2015-11-072-97/+169
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also remove cruft meant to support long-obsolete compilers. More benchmarks. Bug: http://b/23195789 Change-Id: Ief538e41e77a77e8013b2f4f359584e8df2c47d8
* | | | | | | | linker: Add support for dynamic "shim" libsChristopher R. Palmer2015-11-071-0/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new environment variable LD_SHIM_LIBS that is a colon (":") separated list of vertical bar ("|") separated pairs. The pairs are the name for a soinfo reference (executable or shared library) followed by the name of the shim library to load. For example: LD_SHIM_LIBS=rmt_storage|libshim_ioprio.so:/system/lib/libicuuv.so|libshim_icu53.so will instruct the linker to load the dynamic library libshim_ioprio.so whenver rmt_storage is executed [*] and will load libshim_icu53.so whenever any executable or other shared library links against /system/lib/libicuuv.so. There are no restrictions against circular references. In this example, libshim_icu53.so can link against libicuuv.so which provides a simple and convenient means of adding compatibility symbols. [*] Note that the absolute path is not available to the linker and therefore using the name of executables does depend on the invocation and therefore should only be used if absolutely necessary. That is, running /system/bin/rmt_storage would not load any shim libs in this example because it does not match the name of the invocation of the command. If you have trouble determining the sonames being loaded, you can also set the environment variable LD_DEBUG=1 which will cause additional information to be logged to help trace the detection of the shim libs. Change-Id: I0ef80fa466167f7bcb7dac90842bef1c3cf879b6
* | | | | | | | libc: arm: Add optimised memchr to scorpionMichael Bestas2015-11-051-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change-Id: I49513fea4fad28ce053c75fc043117aa1ada794d
* | | | | | | | Merge tag 'android-6.0.0_r26' into cm-13.0Ricardo Cerqueira2015-11-055-6/+44
|\ \ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Android 6.0.0 release 26 Change-Id: Ic73500c2330af39a735307c153fbe3e71b7f2040
| * \ \ \ \ \ \ \ merge in mnc-dr-release history after reset to mnc-dr-devThe Android Automerger2015-10-020-0/+0
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| | * | | | | | | merge in mnc-dr-release history after reset to mnc-dr-devThe Android Automerger2015-09-240-0/+0
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| * | | | | | | | | | | \ \ \ \ \ \ \ am 93a91f0c: Force cts to only run one test at a time.Christopher Ferris2015-09-292-4/+13
| |\ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ \ | | |/ / / / / / / / / / / / / / / / / | |/| | | | | | | | | | | / / / / / / | | | |_|_|_|_|_|_|_|_|_|/ / / / / / | | |/| | | | | | | | | | | | | | | * commit '93a91f0cf4f015762ac1ed57395c4c0de8ba7db3': Force cts to only run one test at a time.
| | * | | | | | | | | | | | | | | | Force cts to only run one test at a time.Christopher Ferris2015-09-252-4/+13
| | |/ / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Also, slightly increase the timeout for each test run. Bug: 24198050 (cherry picked from commit daaaed18ce1d2f2da9d2240e974922299d937670) Change-Id: I29e169e962da803a89abf0a28e071abcafa315b7
| * | | | | | | | | | | | | | | | Increase alternative signal stack size on 64-bit devices.Yabin Cui2015-09-233-2/+31
| |/ / / / / / / / / / / / / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Bug: 23041777 Bug: 24187462 Change-Id: I7d84c0cc775a74753a3e8e101169c0fb5dbf7437
* | | | | | | | | | | | | | | | bionic: Let popen fall back to /sbin/shTom Marshall2015-11-032-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | minivold in recovery uses popen, where /system/bin/sh is not available. Change-Id: I2136b0ca4188b7b44416f5d79492fc006382d4ad
* | | | | | | | | | | | | | | | libc: arm: add optimized memchr implementationYingshiuan Pan2015-10-319-1/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This optimization is extracted from cortex-strings and bionic-ized, and applied to arm-v7a cpus (a7, a9, a15, a53, denver, krait). I ran stringbench[1] on ARM Juno, this optimization could outperform origin C implementation by 77%. [1] https://android.git.linaro.org/gitweb/platform/external/stringbench.git Change-Id: I1c3fb0c89ce2b3ee7e44f492367b6caf6db58ccf Signed-off-by: Yingshiuan Pan <yingshiuan.pan@linaro.org>
* | | | | | | | | | | | | | | | libc: Add Scorpion-optimized variantSteve Kondik2015-10-292-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Based on cortex-a8 variant with the following changes: Use krait memset/strcmp/memmove * Enable with TARGET_CPU_VARIANT := scorpion Change-Id: I01d0f22efba5a418ddd20fca0d0c570d855e0f6f
* | | | | | | | | | | | | | | | Fix over read in strcpy/stpcpy/strcat.Christopher Ferris2015-10-296-157/+203
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This bug will happen when these circumstances are met: - Destination address & 0x7 == 1, strlen of src is 11, 12, 13. - Destination address & 0x7 == 2, strlen of src is 10, 11, 12. - Destination address & 0x7 == 3, strlen of src is 9, 10, 11. - Destination address & 0x7 == 4, strlen of src is 8, 9, 10. In these cases, the dest alignment code does a ldr which reads 4 bytes, and it will read past the end of the source. In most cases, this is probably benign, but if this crosses into a new page it could cause a crash. Fix the labels in the cortex-a9 strcat. Modify the overread test to vary the dst alignment to expost this bug. Also, shrink the strcat/strlcat overread cases since the dst alignment variation increases the runtime too much. Bug: 24345899 Change-Id: Ib34a559bfcebd89861985b29cae6c1e47b5b5855
* | | | | | | | | | | | | | | | Make all labels local.Christopher Ferris2015-10-292-176/+176
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the non-local labels to .L labels. Change-Id: I720e894f2e311af8f4a0970303d8b86575fb69a5
* | | | | | | | | | | | | | | | libm: ARM: reorganize a bit to match ARM64Jake Weinstein2015-10-294-42/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Cleaner naming, especially if there are more ARM-specific routines in the future. Change-Id: Id29db728800ccd612a906e86ccb95c1e7620514d
* | | | | | | | | | | | | | | | Add optimized cortex-a7/cortex-a53 memset/memcpy.Christopher Ferris2015-10-2914-430/+986
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an optimized memset that is ~20% faster for cortex-a7 and cortex-a53. Add a 32 bit optimized cortex-a53 memcpy that is about ~20% faster on cached data. Fix the cortex-a15 __str{cat,cpy}_chk.S, memcpy_base.S to remove the phony functions, since they aren't needed any more. Then add a direct include of these for cortex-a53. Verified the new functions by stepping through all of the major paths and verifying the backtrace is still correct. Bug: 22696180 Change-Id: Iec92a3f82d51243cca76c9aff9f35d920ff865ae
* | | | | | | | | | | | | | | | [AOSP Master] libc: krait: Use performance version of memcpyBrent DeGraaf2015-10-294-104/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * This commit improves performance for small copies compared to the original CAF one. It also cleans up some functions. Change-Id: Iaa52635240da8b8746693186b66b69778e833c32
* | | | | | | | | | | | | | | | Remove pushes from memsets (krait/cortex-a9).Christopher Ferris2015-10-292-28/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the path that only uses r0 in both the krait and cortex-a9 memset, remove the push and use r3 instead. In addition, for cortex-a9, remove the artificial function since it's not needed since dwarf unwinding is now supported on arm. Change-Id: Ia4ed1cc435b03627a7193215e76c8ea3335f949a
* | | | | | | | | | | | | | | | Replace bx lr with update of pc from the stack.Christopher Ferris2015-10-295-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When there is arm assembler of this format: ldmxx sp!, {..., lr} or pop {..., lr} bx lr It can be replaced with: ldmxx sp!, {..., pc} or pop {..., pc} Change-Id: Ic27048c52f90ac4360ad525daf0361a830dc22a3
* | | | | | | | | | | | | | | | Add cortex-a53.a57 target for 32 bit big/little.Christopher Ferris2015-10-291-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The routines optimized for cortex-a7 and cortex-a53 cause performance drops on cortex-a57. Instead create a target that is the middle ground that works relatively well on either core. Change-Id: Ie2b6cc9a59a01c7b30602ee368b2b90f5e886289
* | | | | | | | | | | | | | | | bionic: Allow devices to add device specfic static libsChristopher R. Palmer2015-10-291-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This provides a convenient (albeit powerful enough to be dangerous) hook to add symbols needed to support vendor blobs that do not necessarily match our source code. Doing so via this hook has several advantages over patching the code in question: * The hacks do no pollute other repositories * The hacks do not have any risk of breaking any other devices * The hacks don't just live forever when we forget they exist * The hacks are all easy to find by locating them together When using this, please take extra care to include only the minimal code to support the change. Keep in mind that all code (and all libraries your code links against) will be part of the address space of every single process in the system! Change-Id: I6dcd9ad7cee330febe1a974619144d378b67b364 (cherry picked from commit 12eb9c556ad50585bf0067974c4db41ce2fe0784)
* | | | | | | | | | | | | | | | bionic: Add flag to restore legacy mmap behaviorFlemmard2015-10-192-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * Pre-lollipop mmap would not care whether offset was signed or unsigned. * Lollipop adds 64-bit support which results in sign extension of offset, causing a negative offset when a positive offset > 2^31 is given. Change-Id: I5d19d898fc131cf848217974915d1b466a474f99
generated by cgit v1.1 at 2024-12-22 08:28:51 +0000