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* Revert "bionic: Update mechanism to detect number of CPU's for msm targets"Steve Kondik2012-11-182-20/+0
| | | | This reverts commit a2e0be9822c9bbb0e6bc479ee970bdfed20e8ec9.
* Revert "memmove: Fix the abuse of memcpy() for overlapping regions"Steve Kondik2012-11-181-3/+3
| | | | This reverts commit af820b84625a14eaf199c82c6b4a8773b145668f.
* Revert "timezone: data file should be 32 bit aligned"Steve Kondik2012-11-184-8/+1
| | | | This reverts commit bc0b877a507f394001bb133891032d65e04cd106.
* Fix <sys/klog.h> to correspond to the kernel operations.Elliott Hughes2012-10-071-10/+18
| | | | | | | | This makes the constants correspond to those in the Linux kernel's include/linux/syslog.h, but keeping our old badly-named constants for source compatibility. Change-Id: Ia47d1299205754cbfffd29ed48b497b53d1edaae
* Revert "Upgrade to dlmalloc 2.8.5."Ricardo Cerqueira2012-09-248-7020/+6242
| | | | This reverts commit 5037b101df060ea6a86667b8bc19e534b337e58d.
* Upgrade to dlmalloc 2.8.5.Ian Rogers2012-09-208-6242/+7020
| | | | | | | | | | Move dlmalloc code to upstream-dlmalloc to make pulling upstream changes easier. Declare pvalloc and malloc_usable_size routines present in malloc.h but with missing implementations. Remove other functions from malloc.h that have no implementation nor use in Android. Change-Id: Ia6472ec6cbebc9ad1ef99f4669de9d33fcc2efb4
* msm7627a: Enable neon optimized memove and pow functions.Prachee Ramsinghani2012-09-052-2/+5
| | | | | | | | Define SPARROW_NEON_OPTIMIZATION flag so that neon optimized memove and pow functions are used. Also add Corresponding definitions in make files. Change-Id: I12089fc7002e3ec294e63632bd84e395fbd24936
* bionic: Stack pointer/signal race condition.Peter Enderborg2012-09-041-4/+2
| | | | | | | Move the stackpointer so a captured signal does not corrupt stack variables needed for __thread_entry. Change-Id: I3e1e7b94a6d7cd3a07081f849043262743aa8064
* armv6: REX routines are currently broken, use alternativesPaul Mongold2012-08-151-4/+9
| | | | Change-Id: I7ac05ab6add7802a4cc24fe36f7181e7cdfe07e0
* bionic: Update fcntl header from the kernelNaseer Ahmed2012-07-241-32/+55
| | | | Change-Id: I6ffeeec2e096b4b01de87b8a9cca593dc8b7019a
* memcpy: Fix ARCH_ARM_USE_NON_NEON_MEMCPYRicardo Cerqueira2012-07-191-2/+2
| | | | | | This was broken by the scorpion/krait optimization merges, fixit Change-Id: I689d95d6db2061254729b4d9064203d464d9e0f6
* Don't use -fstack-protector on ssp.cNick Kralevich2012-07-191-1/+20
| | | | | | | | | | | | | Don't use -fstack-protector on ssp.c libc's stack protector initialization routine (__guard_setup) is in bionic/ssp.c. This code deliberately modifies the stack canary. This code should never be compiled with -fstack-protector-all otherwise it will crash (mismatched canary value). Force bionic/ssp.c to be compiled with -fno-stack-protector Change-Id: Ib95a5736e4bafe1a460d6b4e522ca660b417d8d6
* timezone: data file should be 32 bit alignedTom Giordano2012-07-134-1/+8
| | | | | | | | The zoneinfo.dat file is memory mapped and then read as an int array. On some platforms this is causing alignment errors (SIGBUS) because the records are not 32 bit aligned. Change-Id: Ieea8ef07e49ef86d139c52ebfccf4159c0ebd887
* headers: Unbreak some ARM syscallsRicardo Cerqueira2012-07-111-1/+1
| | | | | | | | Restore the outside-kernel exclusion for some syscalls that was removed by change I959b64280e184655ef8c713aa79f9e23cb1f7df4, since these syscalls are used elsewhere. Change-Id: I5b5bf3d78edd137e820d25281a375966b6c009ec
* msm8960: Improve performance of memcpy, memmove, bcopy and memmove_words ↵xkonni2012-07-103-7/+348
| | | | | | | | | | | | | | | | | | (codeaurora) Taken from the following commits to codeaurora https://www.codeaurora.org/gitweb/quic/la/?p=platform/bionic.git;a=commit;h=a5333c8fbeb5190e3a8dc9f99af66eb50b01462c https://www.codeaurora.org/gitweb/quic/la/?p=platform/bionic.git;a=commit;h=6077a9577667fc9999312a2c6daf4d3c77bdf294 Uses following variables in BoardConfig.mk TARGET_USE_KRAIT_BIONIC_OPTIMIZATION := true TARGET_USE_KRAIT_PLD_SET := true TARGET_KRAIT_BIONIC_PLDOFFS := 10 TARGET_KRAIT_BIONIC_PLDTHRESH := 10 TARGET_KRAIT_BIONIC_BBTHRESH := 64 TARGET_KRAIT_BIONIC_PLDSIZE := 64 Change-Id: Iee66f7698dc301507a012e27c91141f3f6925dcb
* Actually set the header guard in "linux-syscalls.h".Elliott Hughes2012-07-102-1/+3
| | | | | | Spotted while merging a MIPS change. Change-Id: I36fb5a07d0bba0c117e9fe9733957bd37ca4b4c0
* Remove the meaningless on Linux if_dl.h header.Elliott Hughes2012-07-102-89/+8
| | | | | | | | | | | | This was misleading 'configure' into thinking we actually support AF_LINK, but we're Linux, so we don't, and we never implemented the functions we declared here either. Reported to AOSP by Jun-ya Kato. (cherry-pick of 5056f1fad1187cd67729bb04ba72397d78256f03.) Change-Id: Ic67f674d2221497c8166994812bb5fc7f0831066
* Remove expired dns cache entries before removing oldestAnders Fredlund2012-07-101-1/+25
| | | | | | | | | A suggestion how to make a smarter delete function when the cache is full. First look through the entire cache and remove all entries which have expired. If none use the old solution and just remove the last entry in the MRU list. Change-Id: I5f997ab35290a55dc6e1ddf37d725759edf83d36
* Avoid multiple dns lookups for the same queryMattias Falk2012-07-103-1/+135
| | | | | | | | | | | | If two or more rapid dns requests for the same server are done from different threads it turns into separate dns reques, if the response of the request isn't found in the cache. This patch avoid multiple request for the same server by letting subsequents request wait until the first request has finished. Change-Id: Ic72ea0e7d3964a4164eddf866feb4357ec4dfe54
* bionic: Add ; after anonymous union declarationBernhard Rosenkraenzer2012-07-101-2/+2
| | | | | | This improves compatibility with different compilers Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org>
* bionic: Fix aliasing violationsBernhard Rosenkraenzer2012-07-108-52/+73
| | | | | | | | | | | | | | This makes bionic compile with compilers enforcing strict adherence to aliasing rules (e.g. gcc 4.6 with -Wstrict-aliasing=2 -Werror=strict-aliasing). Conflicts: libc/netbsd/resolv/res_send.c Change-Id: I640bafe9fef399f856c9e57cb0ab877e8656e522 Signed-off-by: Bernhard Rosenkraenzer <Bernhard.Rosenkranzer@linaro.org> Signed-off-by: Evan McClain <aeroevan@gmail.com>
* getopt(): fix missing carriage return on bad parametersTanguy Pruvot2012-07-101-6/+6
| | | | | | | | This affect all command line tools which show the usage on stdout after an invalid parameter error (printed on stderr) Change-Id: I8e2cb3fda241ab989dc42055f15082f8b3ba1397 Signed-off-by: Tanguy Pruvot <tanguy.pruvot@gmail.com>
* fix ARMv7 optimized strlen() usage conditionnadlabak2012-07-101-1/+1
| | | | Change-Id: Ia2ab059b092f80c02d95ca95d3062954c0ad1023
* Add missing define for libcopybit.Andreas Schneider2012-07-101-0/+2
| | | | | | This is needed by hardware/qcom/display/libcopybit/copybit.cpp. Change-Id: Ic50a75b93b39443b772dd4cab67a55f75ad2b5ad
* Add missing define to build qcom libgralloc.Andreas Schneider2012-07-101-0/+17
| | | | | | This is needed by hardware/qcom/display/libgralloc/pmemalloc.cpp Change-Id: Id0732b82ed6c1852def9688544ec92e04afeff00
* Add missing define to build qcom libgralloc.Andreas Schneider2012-07-101-0/+2
| | | | | | This is needed by hardware/qcom/display/libgralloc/ashmemalloc.cpp. Change-Id: I7b35bcdaedf3874d17a0e6ce18931c11db1e133d
* bionic: Update mechanism to detect number of CPU's for msm targetsAjay Dudani2012-07-102-0/+20
| | | | | | | | | | | | | | | | | | | msm targets use CPU hotplug for power management, which results in /proc/cpuinfo and /proc/stat to return back incorrect number of available CPUs for msm configuration. Use /sys/devices/system/cpu/present instead when indicating total number of CPUs to userspace processes and let system power management take care of when to swich CPUs between online/offline states. Only 0-N format is supported for detecting number of CPUs. 0-N,M format for detecting number of CPUs is not supported, and is currently not a valid configuration on msm targets. ifdef for QCOM_HARDWARE Change-Id: I40ab2f79ca67cdbf7f1bf87d52007f822ee76269
* memcmp: prefetch optimizing for ARM Cortex-A8/A9Jim Huang2012-07-101-12/+69
| | | | | | | | | | | | | | | | | | | | | | | | The original memcmp() was tweaked for ARM9, which is not optimal for ARM Cortex-A cores. This patch merges the prefetch optimizations from ST-Ericsson and removes NEON slowdowns. Reference experiement results on Nexus S (ARM Cortex-A8; 1 GHz) using strbench program: http://pasky.or.cz//dev/glibc/strbench/ [before] size, samples, TIMES[s] - user, system, total) 4 262144 2.510000 0.000000 2.510000 8 131072 1.570000 0.010000 1.590000 32 32768 1.310000 0.000000 1.320000 [after] size, samples, TIMES[s] - user, system, total) 4 262144 2.280000 0.000000 2.290000 8 131072 1.210000 0.000000 1.220000 32 32768 1.040000 0.000000 1.050000 Change-Id: I961847da96d2025f7049773cd2ddaa08579e78d6
* memmove: Fix the abuse of memcpy() for overlapping regionsJim Huang2012-07-101-3/+3
| | | | | | | | memcpy is not defined for overlapping regions. Original author: Chris Dearman <chris@mips.com> Change-Id: Icc2acc860c932eaf1df488630146f4e07388a444
* Revert "dlmalloc: Use ARMv7 version for macro compute_bit2idx and ↵Danesh M2012-07-101-34/+0
| | | | | | | | compute_tree_index" This reverts commit b3421de186d8b6c7d7a3882ebec695d61e8e7534. Causing excessive gc calls and instability.
* Revert "don't hide _nres, necessary for nslookup in busybox."Tanguy Pruvot2012-07-101-0/+1
| | | | | | | | | | This reverts commit 0aa56a2ed38e470259b0fcbfc7ba4387149b81db. Fixed in busybox : http://review.cyanogenmod.com/10762 should be reverted to keep aosp compatibility Change-Id: I173f0a5cffd8f39ea70bee30a3490e04bbfabf19
* Add ARMv7 optimized strlen()Jim Huang2012-07-102-1/+116
| | | | | | | | | | | | | | | | | | Merge the ARM optimized strlen() routine from Linaro. Although it is optimized for ARM Cortex-A9, the performance is still reasonably faster than the original on Cortex-A8 machines. Reference benchmark on Nexus S (ARM Cortex-A8; 1 GHz): [before] prc thr usecs/call samples errors cnt/samp size strlen_1k 1 1 1.31712 97 0 1000 1024 [after] prc thr usecs/call samples errors cnt/samp size strlen_1k 1 1 1.05855 96 0 1000 1024 Change-Id: I809928804726620f399510af1cd1c852ed754403
* dlmalloc: Use ARMv7 version for macro compute_bit2idx and compute_tree_indexJim Huang2012-07-101-0/+34
| | | | | | | | | | | | | | | | | The macro compute_bit2idx(X, I) was definied as "I = ffs(X)-1". This equals to the operation __builtin_ctz(X), and using the new bit-reversal instruction would have been better for ARMv7: rbit r0, r0 clz r0, r0 This patch re-implements macro compute_bit2idx and compute_tree_index by means of the above ARMv7 instructions to be more efficient. Reference: http://hardwarebug.org/2010/01/14/beware-the-builtins/ NOTE: in ICS, the value of macro USE_BUILTIN_FFS was defined to be 0. Change-Id: I9d9f31d6dab0898e56bb925e29ae1c098d841fe2
* sha1: Use bswap* to optimize byte orderJim Huang2012-07-102-44/+66
| | | | | | | | | | | | | | | | bionic libc already makes use of ARMv6+ rev/rev16 instruction for endian conversion, and this patch rewrites some parts of SHA1 implementations with swap32 and swap64 routines, which is known to bring performance improvements. The reference sha1bench on Nexus S: [before] Rounds: 100000, size: 6250K, time: 1.183s, speed: 5.16 MB/s Change-Id: Id04c0fa1467b3006b5a8736cbdd95855ed7c13e4 [after] Rounds: 100000, size: 6250K, time: 1.025s, speed: 5.957 MB/sB
* sha1: code cleanup and use modern C syntaxJim Huang2012-07-102-97/+18
| | | | | | | | Apply the following changes: - Remove out-of-date workaround (SPARC64_GCC_WORKAROUND) - Use C99 prototype and stdint type Change-Id: I630cf97f6824f72f4165e0fa9e5bfdad8edabe48
* Use GCC's __attribute__((const)) to reduce code sizeJim Huang2012-07-103-1/+3
| | | | | | | | | | | | | | | | | | | | | | __attribute__((const)) is mainly intended for the compiler to optimize away repeated calls to a function that the compiler knows will return the same value repeatedly. By adding __attribute__((const)), the compiler can choose to call the function just once and cache the return value. Therefore, this yields code size reduction. Here are the reference results by arm-eabi-size for crespo device: [before] text data bss dec hex filename 267715 10132 45948 323795 4f0d3 [after] text data bss dec hex filename 267387 10132 45948 323467 4ef8b Change-Id: I1d80465c0f88158449702d4dc6398a130eb77195
* msm7627A: Enable 7627A specific memcpy routineChitti Babu Theegala2012-07-103-3/+134
| | | | | | | | | | | | | Cache line size for 7627A is 32 bytes. The existing memcpy routine gives sub-optimal performance for this cache line size. The memcpy routine has been optimized taking this into consideration. Currently 7627A is the only ARM-v7 target with cache line size of 32 bytes, hence this optimized code has been featurized under CORTEX_CACHE_LINE_32 in memcpy.S, memset.S, which can be enabled by definingTARGET_CORTEX_CACHE_LINE_32 in BoardConfig.mk This change also adds corresponding cflag definition in Android.mk. Change-Id: Idea0d1b977f60e0a690ddee36b1d9c67d3c241ef
* TLS: Call kernel helper in additional situationsMichael Bohan2012-07-101-1/+3
| | | | | | | | | | | | | | ARMv6 has HW TLS support, and thus we should be using it rather than hacking the Linux Kernel to use the software mechanism. Unfortunately, ARMv6 targets without Thumb2 do not support the necessary TLS instructions in Thumb Mode. Converting the tls libc routines to ARM Mode will require an additional branch to switch modes. Therefore, let's simply use the Kernel's Helper Routine which already operates in ARM Mode. This changed behavior only applies if the HAVE_ARM_TLS_REGISTER option is defined. Otherwise, the existing paradigm is used. Change-Id: I282697b0ab97cb62affd018494076e6ffa4d392a
* implement work around for tegra errata 657451Gary King2012-07-102-0/+10
| | | | | | | | | | | | | | tegra 2 processors have a bug in the register read path of bit 20 of the CP15 c13, 3 register (used for software thread local storage) the kernel work-around for this bug is to mux the value from bit 20 into bit 0; since the TLS value used by Android is an aligned address, bit 0 is known to be available. Change-Id: If70afa52585d327f9dd5eca479c14ca92532ddd8a Reviewed-on: http://git-master/r/773 Reviewed-by: Gary King <gking@nvidia.com> Tested-by: Gary King <gking@nvidia.com>
* don't hide _nres, necessary for nslookup in busybox.Koushik Dutta2012-07-101-1/+0
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* Modify Android mem* routines with CodeAurora versions.Harshad Bhutada2012-07-104-5/+575
| | | | | | | | | | | | | | | | | | | | | | | | | Update the memcpy, memmove, and memset routines to use the versions from CodeAurora when specified in the bionic/Android.mk file (actually activated in the BoardConfig.mk file under device/<vendor>/<board>). With this change, the mem* routines are only used for the msm8660, while other platforms will use the current Android mem* routines. Future platforms can modify the makefile to use the CodeAurora-based mem* routines as desired. This has the benefit of making the CodeAurora- based routines opt-in instead of opt-out. Also, PLDSIZE and PLDOFFS can be specified in the BoardConfig.mk as well, so other platforms with different PLD tunings can use the same code without modifying the source file itself. Tests with FileCycler-0.3 showed a slight 1.1% improvement with these files on an 8660v2, based on the average of three FileCycler runs with and without the patch. Since the min/max values did not overlap, and the average score showed an improvement, we can consider upstreaming these modifications. Change-Id: I6946076bc6a88a2a2c8667b09494e1eb31e01ee0
* Minor tweak to get memory around corrupted heap chunks dumped.Ben Cheng2012-06-191-20/+22
| | | | Change-Id: I8f72c5c7e23960b13fc53e2354cd74aca8aac3c0
* bionic: import heaptracker as chk_mallocIliyan Malchev2012-06-0111-284/+916
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is a rewrite of libc.debug.malloc = 10 (chk_malloc). It provides the same features as the original (poison freed memory, detect heap overruns and underruns), except that it provides more debugging information whenever it detects a problem. In addition to the original features, the new chk_malloc() implementation detects multiple frees within a given range of the last N allocations, N being configurable via the system property libc.debug.malloc.backlog. Finally, this patch keeps track of all outstanding memory allocations. On program exit, we walk that list and report each outstanding allocation. (There is support (not enabled) for a scanner thread periodically walks over the list of outstanding allocations as well as the backlog of recently-freed allocations, checking for heap-usage errors.) Feature overview: 1) memory leaks 2) multiple frees 3) use after free 4) overrun Implementation: -- for each allocation, there is a: 1) stack trace at the time the allocation is made 2) if the memory is freed, there is also a stack trace at the point 3) a front and rear guard (fence) 4) the stack traces are kept together with the allocation -- the following lists and maintained 1) all outstanding memory allocations 3) a backlog of allocations what are freed; when you call free(), instead of actually freed, the allocation is moved to this backlog; 4) when the backlog of allocations gets full, the oldest entry gets evicted from it; at that point, the allocation is checked for overruns or use-after-free errors, and then actually freed. 5) when the program exits, the list of outstanding allocations and the backlog are inspected for errors, then freed; To use this, set the following system properties before running the process or processes you want to inspect: libc.malloc.debug.backlog # defaults to 100 libc.malloc.debug 10 When a problem is detected, you will see the following on logcat for a multiple free: E/libc ( 7233): +++ ALLOCATION 0x404b9278 SIZE 10 BYTES MULTIPLY FREED! E/libc ( 7233): +++ ALLOCATION 0x404b9278 SIZE 10 ALLOCATED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c658 /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d80 /system/lib/libc.so E/libc ( 7233): #03 pc 4009647c /system/bin/malloctest E/libc ( 7233): #04 pc 00016f24 /system/lib/libc.so E/libc ( 7233): +++ ALLOCATION 0x404b9278 SIZE 10 FIRST FREED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c7d2 /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d94 /system/lib/libc.so E/libc ( 7233): #03 pc 40096490 /system/bin/malloctest E/libc ( 7233): #04 pc 00016f24 /system/lib/libc.so E/libc ( 7233): +++ ALLOCATION 0x404b9278 SIZE 10 NOW BEING FREED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c6ac /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d94 /system/lib/libc.so E/libc ( 7233): #03 pc 400964a0 /system/bin/malloctest E/libc ( 7233): #04 pc 00016f24 /system/lib/libc.so The following for a heap overrun and underrun: E/libc ( 7233): +++ REAR GUARD MISMATCH [10, 11) E/libc ( 7233): +++ ALLOCATION 0x404b9198 SIZE 10 HAS A CORRUPTED REAR GUARD E/libc ( 7233): +++ ALLOCATION 0x404b9198 SIZE 10 ALLOCATED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c658 /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d80 /system/lib/libc.so E/libc ( 7233): #03 pc 40096438 /system/bin/malloctest E/libc ( 7233): #04 pc 00016f24 /system/lib/libc.so E/libc ( 7233): +++ ALLOCATION 0x404b9198 SIZE 10 FREED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c7d2 /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d94 /system/lib/libc.so E/libc ( 7233): #03 pc 40096462 /system/bin/malloctest E/libc ( 7233): #04 pc 00016f24 /system/lib/libc.so E/libc ( 7233): +++ ALLOCATION 0x404b9358 SIZE 10 HAS A CORRUPTED FRONT GUARD E/libc ( 7233): +++ ALLOCATION 0x404b9358 SIZE 10 ALLOCATED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c658 /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d80 /system/lib/libc.so E/libc ( 7233): #03 pc 400964ba /system/bin/malloctest E/libc ( 7233): #04 pc 00016f24 /system/lib/libc.so E/libc ( 7233): +++ ALLOCATION 0x404b9358 SIZE 10 FREED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c7d2 /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d94 /system/lib/libc.so E/libc ( 7233): #03 pc 400964e4 /system/bin/malloctest E/libc ( 7233): #04 pc 00016f24 /system/lib/libc.so The following for a memory leak: E/libc ( 7233): +++ THERE ARE 1 LEAKED ALLOCATIONS E/libc ( 7233): +++ DELETING 4096 BYTES OF LEAKED MEMORY AT 0x404b95e8 (1 REMAINING) E/libc ( 7233): +++ ALLOCATION 0x404b95e8 SIZE 4096 ALLOCATED HERE: E/libc ( 7233): *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** *** E/libc ( 7233): #00 pc 0000c35a /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #01 pc 0000c658 /system/lib/libc_malloc_debug_leak.so E/libc ( 7233): #02 pc 00016d80 /system/lib/libc.so E/libc ( 7233): #03 pc 0001bc94 /system/lib/libc.so E/libc ( 7233): #04 pc 0001edf6 /system/lib/libc.so E/libc ( 7233): #05 pc 0001b80a /system/lib/libc.so E/libc ( 7233): #06 pc 0001c086 /system/lib/libc.so E/libc ( 7233): #07 pc 40096402 /system/bin/malloctest E/libc ( 7233): #08 pc 00016f24 /system/lib/libc.so Change-Id: Ic440e9d05a01e2ea86b25e8998714e88bc2d16e0 Signed-off-by: Iliyan Malchev <malchev@google.com>
* bionic: introduce libc.debug.malloc.programIliyan Malchev2012-05-301-0/+10
| | | | | | | | | | | | | | | | | | | | | | libc.debug.malloc.program provides an additional level of control over which processes to enable libc.debug.malloc functionality for. The string value of libc.debug.malloc.program is matched against the program name; if the value of libc.debug.malloc.program is a substring of the program name, then malloc debug is applied to that program at whatever level libc.debug.malloc specifies. If lib.debug.malloc.program is not specified, then libc.debug.malloc has the same effect as before. For example, to enable libc.deubug.malloc = 10 only to the mediaserver, do the following: adb root # necessary for setprop adb setprop libc.debug.malloc.program mediaserver adb setprop libc.debug.malloc 10 adb kill -9 $(pid mediaserver) Change-Id: I6f01c12f033c8e2e015d73025369d7f1685ba200 Signed-off-by: Iliyan Malchev <malchev@google.com>
* Merge "Ensure that the port number and TXID are properly randomized." into ↵Geremy Condra2012-05-301-1/+37
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| * Ensure that the port number and TXID are properly randomized.Geremy Condra2012-05-241-1/+37
| | | | | | | | | | | | | | This fix reads from /dev/urandom to get the required entropy. Bug: 6535492 Change-Id: Ibc2fec3f71a67607b608ad9b767b0b6504993c1d
* | Print the corrupted address passed to free().Ben Cheng2012-05-241-3/+26
|/ | | | | | | | | | | For example: @@@ ABORTING: INVALID HEAP ADDRESS IN dlfree addr=0x5c3bfbd0 Fatal signal 11 (SIGSEGV) at 0xdeadbaad (code=1), thread 2942 The addr=0x5c3bfbd0 part is new. Change-Id: I8670144b2b0a3a6182384150d762c97dfee5452f
* bionic: add support for non-NEON memcpy() on NEON SoCsPrajakta Gudadhe2012-05-092-1/+4
| | | | | | | | | | Some SoCs that support NEON nevertheless perform better with a non-NEON than a NEON memcpy(). This patch adds build variable ARCH_ARM_USE_NON_NEON_MEMCPY, which can be set in BoardConfig.mk. When ARCH_ARM_USE_NON_NEON_MEMCPY is defined, we compile in the non-NEON optimized memcpy() even if the SoC supports NEON. Change-Id: Ia0e5bee6bad5880ffc5ff8f34a1382d567546cf9
* Implement the "abort" stub in assembly for ARM.Ben Cheng2012-05-083-26/+43
| | | | | | | | | | So that we can always get the full stack trace regardless of gcc's handling of the "noreturn" attribute associated with abort(). [cherry-picked from master] BUG:6455193 Change-Id: I0102355f5bf20e636d3feab9d1424495f38e39e2
* Merge "Update f_accessory.h kernel header" into jb-devMike Lockwood2012-04-261-2/+10
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