| Commit message (Collapse) | Author | Age | Files | Lines |
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The hosts file is normally searched linearly. This is very slow when
the file is large. To mitigate this, read the hosts file and sort the
entries in an in-memory cache. When an address is requested via
gethostbyname or getaddrinfo, binary search the cache.
In case where the cache is not available, return a suitable error code
and fall back to the existing lookup code.
This has been written to behave as much like the existing lookup code as
possible. But note bionic and glibc differ in behavior for some corner
cases. Choose the most standard compliant behavior for these where
possible. Otherwise choose the behavior that seems most reasonable.
Change-Id: I3b322883cbc48b0d76a0ce9d149b59faaac1dc58
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The scripts affect files in external/icu, bionic
and the generated files affect libcore. The files must
be updated together so there is no "obvious" home.
OEM developers seem to want to update ICU
themselves and have been asking how. Moving the
scripts to external/icu and splitting the ICU generation
code into a sub-script they can run makes some sense.
Bug: 23419215
Change-Id: Ia26fa526fd2b560a79f36d327a10e262a85db752
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Change-Id: I71274a6f592356a259ccdbe9c09383bc75e2d26b
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With a different memcpy, __memcpy_base_aligned ceased to exist.
Instead, point to the name defined by whatever includes memcpy_base.S
Change-Id: I242cf49cbada35337ba155d7f170e86a905ff55f
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* Current version seems like overkill, and it doesn't compile with
Clang. Use a simplified version from ARM.
Change-Id: I2fe5467b6a504ea04b5f28a08d92e7c2306772d0
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Ticket: RM-234
Android 6.0.1 release 30
Change-Id: I67a692b84fdc2e0ecbe83870ea3520a746130742
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Changes affecting future time stamps
America/Cayman will not observe daylight saving this year after all.
Revert our guess that it would. (Thanks to Matt Johnson.)
Asia/Chita switches from +0800 to +0900 on 2016-03-27 at 02:00.
(Thanks to Alexander Krivenyshev.)
Asia/Tehran now has DST predictions for the year 2038 and later,
to be March 21 00:00 to September 21 00:00. This is likely better
than predicting no DST, albeit off by a day every now and then.
Changes affecting past and future time stamps
America/Metlakatla switched from PST all year to AKST/AKDT on
2015-11-01 at 02:00. (Thanks to Steffen Thorsen.)
America/Santa_Isabel has been removed, and replaced with a
backward compatibility link to America/Tijuana. Its contents were
apparently based on a misreading of Mexican legislation.
Changes affecting past time stamps
Asia/Karachi's two transition times in 2002 were off by a minute.
(Thanks to Matt Johnson.)
Bug: 26833368
Change-Id: I5af1d69f8ca767369f1cbc4aa863280b960777e0
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This is NOT comprehensive UTF-8 support. It is just a quick hack to
make alternation work in bracket expressions so that the system file
manager can find files with non-ASCII names in root mode. Bracket
expressions that contain non-ASCII ranges are explicitly avoided to
avoid the complexities of unicode collation rules.
Things like the following will now work:
fnmatch("те[с][т].jpg", "тест.jpg", 0);
fnmatch("test[αβγ].txt", "testβ.txt", 0);
Things like the following will still fail:
fnmatch("тес[а-я].txt", "тест.txt", 0);
Jira: CYNGNOS-2336
Change-Id: If38dc6692bc22d20128b0cd8a7632754a496d7fb
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Change-Id: Idcf8c08ff50d21c3a04b7ef80c4044f3f9762f2b
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Including glibc's <libgen.h> will result in the user getting the POSIX
version of basename always, regardless of when it is included relative
to <string.h>. Prior to this patch, our implementation would result in
the one that's included first winning.
Bug: http://b/25459151
Change-Id: Id4aaf1670dad317d6bbc05763a84ee87596e8e59
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Bug: http://b/24918750
Change-Id: I0151cd66ccf79a6169610de35bb9c288c0fa4917
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The optimized memmove on commit 95cc2b990baffb4f1149c16647d4e2e2069054e5
causes odd runtime crashes on kryo. For example, surfaceflinger crashes in
prebuilt adreno libraries when trying to generate the shader cache:
x0 0000007f827256c0 x1 000000000000000b x2 0000007fcd7dfa30 x3 0000000000000000
x4 0000000000000000 x5 0000000000000003 x6 00000000000000ff x7 0000000000000003
x8 0000007f825efa18 x9 0000007f825efa18 x10 0000000000000100 x11 0000000000001000
x16 000000000000006f x17 0000000000000003 x18 0000000000000001 x19 0000007f825f1040
x20 0000007fcd7dfa30 x21 0000007fcd7df990 x22 0000007f88424c10 x23 0000000000000000
x24 0000007fcd7df970 x25 0000007fcd7dfa50 x26 0000000000000004 x27 0000000000000010
x28 0000007fcd7dfa30 x29 0000007fcd7df780 x30 0000007f86ef92b4
sp 0000007fcd7df780 pc 0000007f86ee8d78 pstate 0000000020000000
trace:
pc 00000000009ffd78 /system/vendor/lib64/libllvm-glnext.so
pc 0000000000a102b0 /system/vendor/lib64/libllvm-glnext.so (llvm::BitcodeReader::ParseFunctionBody(llvm::Function*)+904)
pc 0000000000a14020 /system/vendor/lib64/libllvm-glnext.so (llvm::BitcodeReader::Materialize(llvm::GlobalValue*, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> >*)+340)
pc 0000000000a0fe14 /system/vendor/lib64/libllvm-glnext.so (llvm::BitcodeReader::MaterializeModule(llvm::Module*, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> >*)+96)
pc 00000000003b503c /system/vendor/lib64/libllvm-glnext.so (llvm::Module::MaterializeAll(std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> >*)+36)
pc 00000000003b5068 /system/vendor/lib64/libllvm-glnext.so (llvm::Module::MaterializeAllPermanently(std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> >*)+16)
pc 0000000000a0faa0 /system/vendor/lib64/libllvm-glnext.so (llvm::ParseBitcodeFile(llvm::StringRef, llvm::LLVMContext&, std::__1::basic_string<char, std::__1::char_traits<char>, std::__1::allocator<char> >*)+32)
pc 0000000000cf3db4 /system/vendor/lib64/libllvm-glnext.so (ShaderObjects::constructLLVMModule(void*, CompilerContext*, llvm::OwningPtr<llvm::Module>*, E_QGLC_SHADERTYPE)+520)
pc 0000000000c76c4c /system/vendor/lib64/libllvm-glnext.so (ESXLinker::bcConstruct()+440)
pc 0000000000c843cc /system/vendor/lib64/libllvm-glnext.so (SOLinker::linkShaders(QGLC_LINKPROGRAM_DATA*, QGLC_LINKPROGRAM_RESULT*)+92)
pc 0000000000c74cbc /system/vendor/lib64/libllvm-glnext.so (CompilerContext::LinkProgram(unsigned int, QGLC_SRCSHADER_IRSHADER**, QGLC_LINKPROGRAM_DATA*, QGLC_LINKPROGRAM_RESULT*)+496)
pc 0000000000d057a0 /system/vendor/lib64/libllvm-glnext.so (QGLCLinkProgram(void*, unsigned int, QGLC_SRCSHADER_IRSHADER**, QGLC_LINKPROGRAM_DATA*, QGLC_LINKPROGRAM_RESULT*)+76)
pc 00000000001a49c4 /system/vendor/lib64/egl/libGLESv2_adreno.so (EsxShaderCompiler::CompileProgram(EsxContext*, EsxProgram const*, EsxLinkedList const*, EsxInfoLog*)+1380)
pc 000000000018d5b8 /system/vendor/lib64/egl/libGLESv2_adreno.so (EsxProgram::Link(EsxContext*)+408)
pc 000000000012e6bc /system/vendor/lib64/egl/libGLESv2_adreno.so (EsxContext::LinkProgram(EsxProgram*)+60)
pc 000000000010be44 /system/vendor/lib64/egl/libGLESv2_adreno.so (glLinkProgram+36)
pc 0000007f88bddad0 <unknown>
pc 0000007f88bddf60 <unknown>
pc 0000007f88be18b8 <unknown>
pc 0000007f88bdfbb0 <unknown>
pc 0000007f88bca594 <unknown>
pc 0000007f88bcb350 <unknown>
pc 0000007f88bc9fec <unknown>
pc 0000007f88bc8f28 <unknown>
pc 0000007f88bc8c90 <unknown>
pc 0000007f88af8ed4 <unknown> (android::Looper::pollInner(int)+312)
pc 0000007f88af920c <unknown> (android::Looper::pollOnce(int, int*, int*, void**)+80)
pc 0000007f88bc5034 <unknown>
pc 0000007f88bc8784 <unknown> (android::SurfaceFlinger::run()+20)
pc 0000007f88c8c190 <unknown>
pc 000000000001bcd8 /system/lib64/libc.so (__libc_init+100)
pc 0000007f88c8bfcc <unknown>
Change-Id: I9621f98b6683a3662b654f84c31ed0247ee81900
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That's really not safe...
Change-Id: If79af951830966fc21812cd0f60a8998a752a941
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The optimized memmove on commit 95cc2b990baffb4f1149c16647d4e2e2069054e5
breaks the boot on denver64/flounder, so we should use the old
memmove to keep the generic memmove optimized.
Change-Id: Ie5e4b5b56d0aeb4b4c22eb6450ac702c05b2ece2
Signed-off-by: André Pinela <sheffzor@gmail.com>
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tpacket already notifies userspace about packets filtered with
ip_summed field set to CHECKSUM_PARTIAL.
Add a new flag for tpacket framework to pass to userspace for
packets with ip_summed field CHECKSUM_UNNECESSARY.
Change-Id: Icf308143a76269ff38c3238f1ca235b97e57dde9
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https://android.googlesource.com/platform/bionic into cm-13.0
Android 6.0.1 release 3
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Change-Id: I63c4f3a4e56f30d6f476ad2c623c23ee7e1a3778
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am: afff4442ae
* commit 'afff4442ae092469f298a71862d61c65ceb67b03':
Sync with upstream NetBSD lib/libc/regex.
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Change-Id: I56c1bb2adb4b6a48733c928415e788e689b4944e
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am: 055a66c9b1
* commit '055a66c9b1017c01b82c12b65a571bf9efad8b19':
Sync with upstream NetBSD lib/libc/regex.
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Bug: http://b/22850181
Change-Id: I11a51a2031e68a953ccd5691da98c699c7d01904
(cherry-picked from commit 71927a82379f7a72559ea96e6678d6215090937f)
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Changes affecting future time stamps
Turkey's 2015 fall-back transition is scheduled for Nov. 8, not Oct. 25.
(Thanks to Fatih.)
Norfolk moves from +1130 to +1100 on 2015-10-04 at 02:00 local time.
(Thanks to Alexander Krivenyshev.)
Fiji's 2016 fall-back transition is scheduled for January 17, not 24.
(Thanks to Ken Rylander.)
Fort Nelson, British Columbia will not fall back on 2015-11-01. It has
effectively been on MST (-0700) since it advanced its clocks on 2015-03-08.
New zone America/Fort_Nelson. (Thanks to Matt Johnson.)
Changes affecting past time stamps
Norfolk observed DST from 1974-10-27 02:00 to 1975-03-02 02:00.
Bug: 24595281
(cherry-picked from commit 31740bfdb942399235e42ea920b6b717dfa0279c)
Change-Id: I6a57fbdaf12a4b4ebf2a760fd3bd872055621106
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Bug: http://b/22850181
(cherry picked from commit 71927a82379f7a72559ea96e6678d6215090937f)
Change-Id: I4a914f0594a66f38efb3026b7ba9d28a4887cb2d
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Use dedicated alarm type and clock type for poweroff alarm.
Change-Id: I937730994c6690b21868745e192d8c12ab818776
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Change-Id: I3991c06dd4813c7cc73d50b56fd7974116d79892
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* Further tuning for performance.
Change-Id: Id08eaab885f9743fa7575077924a947c1b88e4ff
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Change-Id: Iee9a0bf55279f80475db67a70ad5b4b205450298
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bionic is built without _FILE_OFFSET_BITS=64, so internally regoff_t
was 32-bit on LP32, but code compiled with _FILE_OFFSET_BITS would
expect rm_so and rm_eo in struct regmatch_t to be 64-bit, leading to
confusion.
Bug: http://b/23566443
Change-Id: Iae92fa545104068e4f64ce1977f5ec616859638c
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Change-Id: I59a0aa618bf8139dc0368af9ddf881eba5d3eadf
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Change-Id: Ic20f93a0052a49bd76cd6795f51e8606ccfbf11c
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This is an optimized memset for AArch64. Memset is split into 4 main
cases: small sets of up to 16 bytes, medium of 16..96 bytes which are
fully unrolled. Large memsets of more than 96 bytes align the
destination and use an unrolled loop processing 64 bytes per
iteration. Memsets of zero of more than 256 use the dc zva
instruction, and there are faster versions for the common ZVA sizes 64
or 128. STP of Q registers is used to reduce codesize without loss of
performance.
Change-Id: I0c5b5ec5ab8a1fd0f23eee8fbacada0be08e841f
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This is an optimized memcpy for AArch64. Copies are split into 3 main
cases: small copies of up to 16 bytes, medium copies of 17..96 bytes
which are fully unrolled. Large copies of more than 96 bytes align
the destination and use an unrolled loop processing 64 bytes per
iteration. In order to share code with memmove, small and medium
copies read all data before writing, allowing any kind of overlap. On
a random copy test memcpy is 40.8% faster on A57 and 28.4% on A53.
Change-Id: Ibb9483e45bbc0e8ca3d5ce98a31c55dfd8a5ac28
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This is an optimized memmove for AArch64. All copies of up to 96
bytes and all backward copies are done by the new memcpy. The only
remaining case is large forward copies which are done in the same way
as the memcpy loop, but copying from the end rather than the start.
Change-Id: I635bd2798a755256f748b2af19b1a56fb85a40c6
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* Deprecated by ce9ce28e5d760e32ab6c894dfaf7b8dad6de7ff6
* Already removed from Denver memset
Change-Id: I7beda29a799c7fa11f5a239d78626f4da1b581a2
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* bcopy is deprecated on LP64 by the following commit:
https://android.googlesource.com/platform/bionic/+/ce9ce28e5d760e32ab6c894dfaf7b8dad6de7ff6
Change-Id: I6849916f0ec4a2d0db9a360999ad1dc8edda952b
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Change-Id: I49513fea4fad28ce053c75fc043117aa1ada794d
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Android 6.0.0 release 26
Change-Id: Ic73500c2330af39a735307c153fbe3e71b7f2040
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Bug: 23041777
Bug: 24187462
Change-Id: I7d84c0cc775a74753a3e8e101169c0fb5dbf7437
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minivold in recovery uses popen, where /system/bin/sh is not available.
Change-Id: I2136b0ca4188b7b44416f5d79492fc006382d4ad
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This optimization is extracted from cortex-strings and bionic-ized,
and applied to arm-v7a cpus (a7, a9, a15, a53, denver, krait).
I ran stringbench[1] on ARM Juno, this optimization could outperform
origin C implementation by 77%.
[1] https://android.git.linaro.org/gitweb/platform/external/stringbench.git
Change-Id: I1c3fb0c89ce2b3ee7e44f492367b6caf6db58ccf
Signed-off-by: Yingshiuan Pan <yingshiuan.pan@linaro.org>
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* Based on cortex-a8 variant with the following changes:
Use krait memset/strcmp/memmove
* Enable with TARGET_CPU_VARIANT := scorpion
Change-Id: I01d0f22efba5a418ddd20fca0d0c570d855e0f6f
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This bug will happen when these circumstances are met:
- Destination address & 0x7 == 1, strlen of src is 11, 12, 13.
- Destination address & 0x7 == 2, strlen of src is 10, 11, 12.
- Destination address & 0x7 == 3, strlen of src is 9, 10, 11.
- Destination address & 0x7 == 4, strlen of src is 8, 9, 10.
In these cases, the dest alignment code does a ldr which reads 4 bytes,
and it will read past the end of the source. In most cases, this is
probably benign, but if this crosses into a new page it could cause a
crash.
Fix the labels in the cortex-a9 strcat.
Modify the overread test to vary the dst alignment to expost this bug.
Also, shrink the strcat/strlcat overread cases since the dst alignment
variation increases the runtime too much.
Bug: 24345899
Change-Id: Ib34a559bfcebd89861985b29cae6c1e47b5b5855
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Change the non-local labels to .L labels.
Change-Id: I720e894f2e311af8f4a0970303d8b86575fb69a5
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Add an optimized memset that is ~20% faster for cortex-a7 and
cortex-a53.
Add a 32 bit optimized cortex-a53 memcpy that is about ~20% faster
on cached data.
Fix the cortex-a15 __str{cat,cpy}_chk.S, memcpy_base.S to remove
the phony functions, since they aren't needed any more. Then add
a direct include of these for cortex-a53.
Verified the new functions by stepping through all of the major
paths and verifying the backtrace is still correct.
Bug: 22696180
Change-Id: Iec92a3f82d51243cca76c9aff9f35d920ff865ae
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* This commit improves performance for small copies compared to the original
CAF one. It also cleans up some functions.
Change-Id: Iaa52635240da8b8746693186b66b69778e833c32
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On the path that only uses r0 in both the krait and cortex-a9
memset, remove the push and use r3 instead.
In addition, for cortex-a9, remove the artificial function since
it's not needed since dwarf unwinding is now supported on arm.
Change-Id: Ia4ed1cc435b03627a7193215e76c8ea3335f949a
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When there is arm assembler of this format:
ldmxx sp!, {..., lr} or pop {..., lr}
bx lr
It can be replaced with:
ldmxx sp!, {..., pc} or pop {..., pc}
Change-Id: Ic27048c52f90ac4360ad525daf0361a830dc22a3
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The routines optimized for cortex-a7 and cortex-a53 cause performance
drops on cortex-a57. Instead create a target that is the middle ground
that works relatively well on either core.
Change-Id: Ie2b6cc9a59a01c7b30602ee368b2b90f5e886289
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This provides a convenient (albeit powerful enough to be dangerous)
hook to add symbols needed to support vendor blobs that do not
necessarily match our source code.
Doing so via this hook has several advantages over patching the
code in question:
* The hacks do no pollute other repositories
* The hacks do not have any risk of breaking any other devices
* The hacks don't just live forever when we forget they exist
* The hacks are all easy to find by locating them together
When using this, please take extra care to include only the
minimal code to support the change. Keep in mind that all
code (and all libraries your code links against) will be
part of the address space of every single process in
the system!
Change-Id: I6dcd9ad7cee330febe1a974619144d378b67b364
(cherry picked from commit 12eb9c556ad50585bf0067974c4db41ce2fe0784)
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