From 628a9221c0d10574d55dd02ea19f284139b706d8 Mon Sep 17 00:00:00 2001 From: Prachee Ramsinghani Date: Mon, 23 May 2011 17:33:15 +0530 Subject: msm7627A: Enable 7627A specific memcpy routine Cache line size for 7627A is 32 bytes. The existing memcpy routine gives sub-optimal performance for this cache line size. The memcpy routine has been optimized taking this into consideration. Currently 7627A is the only ARM-v7 target with cache line size of 32 bytes, hence this optimized code has been featurized under CORTEX_CACHE_LINE_32 in memcpy.S, which can be enabled by defining TARGET_CORTEX_CACHE_LINE_32 in BoardConfig.mk This change also adds corresponding cflag definition in Android.mk. Change-Id: I984e8fbb6fa7f32ccfa2264809f1668f7633cb99 --- libc/Android.mk | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'libc/Android.mk') diff --git a/libc/Android.mk b/libc/Android.mk index dcd7ba4..6a8034a 100644 --- a/libc/Android.mk +++ b/libc/Android.mk @@ -511,6 +511,10 @@ ifeq ($(TARGET_ARCH),arm) libc_common_cflags += -DPLDSIZE=$(TARGET_SCORPION_BIONIC_PLDSIZE) endif endif + + ifeq ($(TARGET_CORTEX_CACHE_LINE_32),true) + libc_common_cflags += -DCORTEX_CACHE_LINE_32 + endif else # !arm ifeq ($(TARGET_ARCH),x86) libc_crt_target_cflags := -m32 -- cgit v1.1