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author | ctruta@blackberry.com <ctruta@blackberry.com@0039d316-1c4b-4281-b951-d872f2087c98> | 2014-02-08 04:59:55 +0000 |
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committer | ctruta@blackberry.com <ctruta@blackberry.com@0039d316-1c4b-4281-b951-d872f2087c98> | 2014-02-08 04:59:55 +0000 |
commit | 9267710a4799c6fc0fb39e9add0871e2e7b9b6a9 (patch) | |
tree | 7dcee91965a9fd1171a659926c0b9d62f5040d43 /base/atomicops_internals_x86_gcc.cc | |
parent | f330b76298ce76aa490c787dc10b5d018ab1d6e5 (diff) | |
download | chromium_src-9267710a4799c6fc0fb39e9add0871e2e7b9b6a9.zip chromium_src-9267710a4799c6fc0fb39e9add0871e2e7b9b6a9.tar.gz chromium_src-9267710a4799c6fc0fb39e9add0871e2e7b9b6a9.tar.bz2 |
Atomic ops cleanup.
Use <stdint.h> instead of "base/basictypes.h".
Put AtomicOps_Internalx86CPUFeaturesInit in the anonymous namespace.
Fix formatting issues.
BUG=
Review URL: https://codereview.chromium.org/143273005
git-svn-id: svn://svn.chromium.org/chrome/trunk/src@249938 0039d316-1c4b-4281-b951-d872f2087c98
Diffstat (limited to 'base/atomicops_internals_x86_gcc.cc')
-rw-r--r-- | base/atomicops_internals_x86_gcc.cc | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/base/atomicops_internals_x86_gcc.cc b/base/atomicops_internals_x86_gcc.cc index 933ca51..a208a98 100644 --- a/base/atomicops_internals_x86_gcc.cc +++ b/base/atomicops_internals_x86_gcc.cc @@ -5,10 +5,10 @@ // This module gets enough CPU information to optimize the // atomicops module on x86. +#include <stdint.h> #include <string.h> #include "base/atomicops.h" -#include "base/basictypes.h" // This file only makes sense with atomicops_internals_x86_gcc.h -- it // depends on structs that are defined in that file. If atomicops.h @@ -21,16 +21,16 @@ // must preserve that register's value across cpuid instructions. #if defined(__i386__) #define cpuid(a, b, c, d, inp) \ - asm ("mov %%ebx, %%edi\n" \ - "cpuid\n" \ - "xchg %%edi, %%ebx\n" \ - : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp)) -#elif defined (__x86_64__) + asm("mov %%ebx, %%edi\n" \ + "cpuid\n" \ + "xchg %%edi, %%ebx\n" \ + : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp)) +#elif defined(__x86_64__) #define cpuid(a, b, c, d, inp) \ - asm ("mov %%rbx, %%rdi\n" \ - "cpuid\n" \ - "xchg %%rdi, %%rbx\n" \ - : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp)) + asm("mov %%rbx, %%rdi\n" \ + "cpuid\n" \ + "xchg %%rdi, %%rbx\n" \ + : "=a" (a), "=D" (b), "=c" (c), "=d" (d) : "a" (inp)) #endif #if defined(cpuid) // initialize the struct only on x86 @@ -43,12 +43,14 @@ struct AtomicOps_x86CPUFeatureStruct AtomicOps_Internalx86CPUFeatures = { false, // no SSE2 }; +namespace { + // Initialize the AtomicOps_Internalx86CPUFeatures struct. -static void AtomicOps_Internalx86CPUFeaturesInit() { - uint32 eax; - uint32 ebx; - uint32 ecx; - uint32 edx; +void AtomicOps_Internalx86CPUFeaturesInit() { + uint32_t eax; + uint32_t ebx; + uint32_t ecx; + uint32_t edx; // Get vendor string (issue CPUID with eax = 0) cpuid(eax, ebx, ecx, edx, 0); @@ -85,8 +87,6 @@ static void AtomicOps_Internalx86CPUFeaturesInit() { AtomicOps_Internalx86CPUFeatures.has_sse2 = ((edx >> 26) & 1); } -namespace { - class AtomicOpsx86Initializer { public: AtomicOpsx86Initializer() { |