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authormazda@chromium.org <mazda@chromium.org@0039d316-1c4b-4281-b951-d872f2087c98>2014-05-08 02:12:02 +0000
committermazda@chromium.org <mazda@chromium.org@0039d316-1c4b-4281-b951-d872f2087c98>2014-05-08 02:12:02 +0000
commit27cccf1380c02ee30e83da8a08de0ff9dbe079dc (patch)
tree9b1f2382cfa30bcdd3dcadc9b6dec0dfb3f8cd9b /ppapi/nacl_irt/public
parentb702d368dc92f7a01a777ce036844163001187a0 (diff)
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Implement nacl_irt_icache for non-sfi mode.
This CL adds nacl_irt_icache, which is used for clearing icache. Currently this is only for non-sfi mode on ARM. BUG=359178 TEST=Checked apps that use cacheflush work. TEST=nacl_loader_unittests --gtest_filter=NaClIrtClearCacheTest.* # On ARM Chromebook Review URL: https://codereview.chromium.org/250783004 git-svn-id: svn://svn.chromium.org/chrome/trunk/src@269015 0039d316-1c4b-4281-b951-d872f2087c98
Diffstat (limited to 'ppapi/nacl_irt/public')
-rw-r--r--ppapi/nacl_irt/public/irt_nonsfi.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/ppapi/nacl_irt/public/irt_nonsfi.h b/ppapi/nacl_irt/public/irt_nonsfi.h
new file mode 100644
index 0000000..acc0eac
--- /dev/null
+++ b/ppapi/nacl_irt/public/irt_nonsfi.h
@@ -0,0 +1,24 @@
+/*
+ * Copyright 2014 The Chromium Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+#ifndef PPAPI_NACL_IRT_PUBLIC_IRT_NONSFI_H_
+#define PPAPI_NACL_IRT_PUBLIC_IRT_NONSFI_H_
+
+#include <stddef.h>
+
+/*
+ * This interface is only available on ARM, only for Non-SFI.
+ */
+#define NACL_IRT_ICACHE_v0_1 "nacl-irt-icache-0.1"
+struct nacl_irt_icache {
+ /*
+ * clear_cache() makes instruction cache and data cache for the address
+ * range from |addr| to |(intptr_t)addr + size| (exclusive) coherent.
+ */
+ int (*clear_cache)(void* addr, size_t size);
+};
+
+#endif // PPAPI_NACL_IRT_PUBLIC_IRT_NONSFI_H_