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-rw-r--r--base/atomicops_internals_x86_gcc.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/base/atomicops_internals_x86_gcc.cc b/base/atomicops_internals_x86_gcc.cc
index b7e1d926..600bc5f 100644
--- a/base/atomicops_internals_x86_gcc.cc
+++ b/base/atomicops_internals_x86_gcc.cc
@@ -70,7 +70,7 @@ static void AtomicOps_Internalx86CPUFeaturesInit() {
// Opteron Rev E has a bug in which on very rare occasions a locked
// instruction doesn't act as a read-acquire barrier if followed by a
- // non-locked read-modify-write instruction. Rev F has this bug in
+ // non-locked read-modify-write instruction. Rev F has this bug in
// pre-release versions, but not in versions released to customers,
// so we test only for Rev E, which is family 15, model 32..63 inclusive.
if (strcmp(vendor, "AuthenticAMD") == 0 && // AMD