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| author | Eli Friedman <eli.friedman@gmail.com> | 2011-08-08 19:49:37 +0000 |
|---|---|---|
| committer | Eli Friedman <eli.friedman@gmail.com> | 2011-08-08 19:49:37 +0000 |
| commit | 2cb1dfa4464c8dc551d93e0ce34d7a2f797304db (patch) | |
| tree | ad754347739ea6d0bc1e9fa7639617162e4ddd3d | |
| parent | 08de97a5b024c3dc7dd051ecaa63d7ec1a27a5cf (diff) | |
| download | external_llvm-2cb1dfa4464c8dc551d93e0ce34d7a2f797304db.zip external_llvm-2cb1dfa4464c8dc551d93e0ce34d7a2f797304db.tar.gz external_llvm-2cb1dfa4464c8dc551d93e0ce34d7a2f797304db.tar.bz2 | |
Fix up the patterns for SXTB, SXTH, UXTB, and UXTH so that they are correctly active without HasT2ExtractPack. PR10611.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@137061 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 11 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-sxt-uxt.ll | 29 |
2 files changed, 35 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 873c3d6..8fd8a77 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -977,7 +977,8 @@ multiclass T2I_st<bits<2> opcod, string opc, class T2I_ext_rrot<bits<3> opcod, string opc, PatFrag opnode> : T2TwoReg<(outs rGPR:$Rd), (ins rGPR:$Rm, rot_imm:$rot), IIC_iEXTr, opc, ".w\t$Rd, $Rm$rot", - [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]> { + [(set rGPR:$Rd, (opnode (rotr rGPR:$Rm, rot_imm:$rot)))]>, + Requires<[IsThumb2]> { let Inst{31-27} = 0b11111; let Inst{26-23} = 0b0100; let Inst{22-20} = opcod; @@ -3407,9 +3408,9 @@ def t2CDP2 : T2Cop<0b1111, (outs), (ins p_imm:$cop, imm0_15:$opc1, // SXT/UXT with no rotate let AddedComplexity = 16 in { def : T2Pat<(and rGPR:$Rm, 0x000000FF), (t2UXTB rGPR:$Rm, 0)>, - Requires<[HasT2ExtractPack, IsThumb2]>; + Requires<[IsThumb2]>; def : T2Pat<(and rGPR:$Rm, 0x0000FFFF), (t2UXTH rGPR:$Rm, 0)>, - Requires<[HasT2ExtractPack, IsThumb2]>; + Requires<[IsThumb2]>; def : T2Pat<(and rGPR:$Rm, 0x00FF00FF), (t2UXTB16 rGPR:$Rm, 0)>, Requires<[HasT2ExtractPack, IsThumb2]>; def : T2Pat<(add rGPR:$Rn, (and rGPR:$Rm, 0x00FF)), @@ -3421,9 +3422,9 @@ def : T2Pat<(add rGPR:$Rn, (and rGPR:$Rm, 0xFFFF)), } def : T2Pat<(sext_inreg rGPR:$Src, i8), (t2SXTB rGPR:$Src, 0)>, - Requires<[HasT2ExtractPack, IsThumb2]>; + Requires<[IsThumb2]>; def : T2Pat<(sext_inreg rGPR:$Src, i16), (t2SXTH rGPR:$Src, 0)>, - Requires<[HasT2ExtractPack, IsThumb2]>; + Requires<[IsThumb2]>; def : T2Pat<(add rGPR:$Rn, (sext_inreg rGPR:$Rm, i8)), (t2SXTAB rGPR:$Rn, rGPR:$Rm, 0)>, Requires<[HasT2ExtractPack, IsThumb2]>; diff --git a/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll b/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll new file mode 100644 index 0000000..ab888e6 --- /dev/null +++ b/test/CodeGen/Thumb2/thumb2-sxt-uxt.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s -march=thumb -mcpu=cortex-m3 | FileCheck %s + +define i32 @test1(i16 zeroext %z) nounwind { +; CHECK: test1: +; CHECK: sxth + %r = sext i16 %z to i32 + ret i32 %r +} + +define i32 @test2(i8 zeroext %z) nounwind { +; CHECK: test2: +; CHECK: sxtb + %r = sext i8 %z to i32 + ret i32 %r +} + +define i32 @test3(i16 signext %z) nounwind { +; CHECK: test3: +; CHECK: uxth + %r = zext i16 %z to i32 + ret i32 %r +} + +define i32 @test4(i8 signext %z) nounwind { +; CHECK: test4: +; CHECK: uxtb + %r = zext i8 %z to i32 + ret i32 %r +} |