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| author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2014-07-30 00:44:03 +0000 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-08-26 17:59:23 -0700 |
| commit | 63045274494a5adfedbd4de7280386948f7ca9b9 (patch) | |
| tree | 4ed41416930966c711e68e3b0541a50a934c60ca | |
| parent | 080fb91868d9464ed7ed94b336dae6683b434098 (diff) | |
| download | external_llvm-63045274494a5adfedbd4de7280386948f7ca9b9.zip external_llvm-63045274494a5adfedbd4de7280386948f7ca9b9.tar.gz external_llvm-63045274494a5adfedbd4de7280386948f7ca9b9.tar.bz2 | |
Add support for scalarizing ctlz_zero_undef
Fix the missing case in ScalarizeVectorResult() that was exposed with
libclcore.bc in Android.
Differential Revision: http://reviews.llvm.org/D4645
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@214266 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp | 1 | ||||
| -rw-r--r-- | test/CodeGen/Mips/ctlz-v.ll | 19 |
2 files changed, 20 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp index f77c592..dd98ffd 100644 --- a/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp +++ b/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp @@ -69,6 +69,7 @@ void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) { case ISD::ANY_EXTEND: case ISD::BSWAP: case ISD::CTLZ: + case ISD::CTLZ_ZERO_UNDEF: case ISD::CTPOP: case ISD::CTTZ: case ISD::FABS: diff --git a/test/CodeGen/Mips/ctlz-v.ll b/test/CodeGen/Mips/ctlz-v.ll new file mode 100644 index 0000000..270f404 --- /dev/null +++ b/test/CodeGen/Mips/ctlz-v.ll @@ -0,0 +1,19 @@ +; RUN: llc < %s -march=mipsel -mcpu=mips32r2 | FileCheck %s -check-prefix=MIPS32 +; RUN: llc < %s -march=mips64el -mcpu=mips64r2 | FileCheck %s -check-prefix=MIPS64 + +declare <2 x i32> @llvm.ctlz.v2i32(<2 x i32>, i1) + +define <2 x i32> @ctlzv2i32(<2 x i32> %x) { +entry: +; MIPS32: clz $2, $4 +; MIPS32: jr $ra +; MIPS32: clz $3, $5 + +; MIPS64: clz $2, $4 +; MIPS64: jr $ra +; MIPS64: clz $3, $5 + + %ret = call <2 x i32> @llvm.ctlz.v2i32(<2 x i32> %x, i1 true) + ret <2 x i32> %ret +} + |