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author | Chris Lattner <sabre@nondot.org> | 2005-01-01 16:10:12 +0000 |
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committer | Chris Lattner <sabre@nondot.org> | 2005-01-01 16:10:12 +0000 |
commit | 6dec0b09d5f01bf2fe4f26209f339310b2de4440 (patch) | |
tree | 1e36ab14572d13b503c892f520f3927396c139eb | |
parent | e7f96c515efb92e477217ab97cf1a617901daf79 (diff) | |
download | external_llvm-6dec0b09d5f01bf2fe4f26209f339310b2de4440.zip external_llvm-6dec0b09d5f01bf2fe4f26209f339310b2de4440.tar.gz external_llvm-6dec0b09d5f01bf2fe4f26209f339310b2de4440.tar.bz2 |
Fix a FIXME: Select instructions on longs were miscompiled.
While we're at it, improve codegen of select instructions. For this
testcase:
int %test(bool %C, int %A, int %B) {
%D = select bool %C, int %A, int %B
ret int %D
}
We used to generate this code:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
b .LBB_test_3 ;
.LBB_test_2: ;
or r5, r4, r4
.LBB_test_3: ;
or r3, r5, r5
blr
Now we emit:
_test:
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
or r4, r5, r5
.LBB_test_2: ;
or r3, r4, r4
blr
-Chris
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@19214 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PowerPC/PPC32ISelSimple.cpp | 28 |
1 files changed, 9 insertions, 19 deletions
diff --git a/lib/Target/PowerPC/PPC32ISelSimple.cpp b/lib/Target/PowerPC/PPC32ISelSimple.cpp index bd6c7e4..a56416d 100644 --- a/lib/Target/PowerPC/PPC32ISelSimple.cpp +++ b/lib/Target/PowerPC/PPC32ISelSimple.cpp @@ -1429,34 +1429,25 @@ void PPC32ISel::emitSelectOperation(MachineBasicBlock *MBB, // thisMBB: // ... + // TrueVal = ... // cmpTY cr0, r1, r2 // bCC copy1MBB // fallthrough --> copy0MBB MachineBasicBlock *copy0MBB = new MachineBasicBlock(LLVM_BB); - MachineBasicBlock *copy1MBB = new MachineBasicBlock(LLVM_BB); MachineBasicBlock *sinkMBB = new MachineBasicBlock(LLVM_BB); - BuildMI(BB, Opcode, 2).addReg(PPC::CR0).addMBB(copy1MBB); + unsigned TrueValue = getReg(TrueVal, BB, BB->begin()); + BuildMI(BB, Opcode, 2).addReg(PPC::CR0).addMBB(sinkMBB); F->getBasicBlockList().insert(It, copy0MBB); - F->getBasicBlockList().insert(It, copy1MBB); F->getBasicBlockList().insert(It, sinkMBB); // Update machine-CFG edges BB->addSuccessor(copy0MBB); - BB->addSuccessor(copy1MBB); + BB->addSuccessor(sinkMBB); // copy0MBB: // %FalseValue = ... - // b sinkMBB + // # fallthrough to sinkMBB BB = copy0MBB; unsigned FalseValue = getReg(FalseVal, BB, BB->begin()); - BuildMI(BB, PPC::B, 1).addMBB(sinkMBB); - // Update machine-CFG edges - BB->addSuccessor(sinkMBB); - - // copy1MBB: - // %TrueValue = ... - // fallthrough - BB = copy1MBB; - unsigned TrueValue = getReg(TrueVal, BB, BB->begin()); // Update machine-CFG edges BB->addSuccessor(sinkMBB); @@ -1465,13 +1456,12 @@ void PPC32ISel::emitSelectOperation(MachineBasicBlock *MBB, // ... BB = sinkMBB; BuildMI(BB, PPC::PHI, 4, DestReg).addReg(FalseValue) - .addMBB(copy0MBB).addReg(TrueValue).addMBB(copy1MBB); + .addMBB(copy0MBB).addReg(TrueValue).addMBB(thisMBB); - // For a register pair representing a long value, define the second reg - // FIXME: Can this really be correct for selecting longs? + // For a register pair representing a long value, define the top part. if (getClassB(TrueVal->getType()) == cLong) - BuildMI(BB, PPC::LI, 1, DestReg+1).addImm(0); - return; + BuildMI(BB, PPC::PHI, 4, DestReg+1).addReg(FalseValue+1) + .addMBB(copy0MBB).addReg(TrueValue+1).addMBB(thisMBB); } |