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author | Evan Cheng <evan.cheng@apple.com> | 2009-10-25 07:47:07 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2009-10-25 07:47:07 +0000 |
commit | f5fe5e4e79689933ae9da99e5b62fc661e5421dd (patch) | |
tree | 855354008b4f74f82b79d8dea29d3d65b8ba6e0a | |
parent | f5a86f45e75ec744c203270ffa03659eb0a220c1 (diff) | |
download | external_llvm-f5fe5e4e79689933ae9da99e5b62fc661e5421dd.zip external_llvm-f5fe5e4e79689933ae9da99e5b62fc661e5421dd.tar.gz external_llvm-f5fe5e4e79689933ae9da99e5b62fc661e5421dd.tar.bz2 |
Add isIdentityCopy to check for identity copy (or extract_subreg, etc.)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@85044 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 28 |
1 files changed, 19 insertions, 9 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index d64df44..b9ad1f9 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -145,20 +145,30 @@ public: /// isIdentityCopy - Return true if the instruction is a copy (or /// extract_subreg, insert_subreg, subreg_to_reg) where the source and /// destination registers are the same. - bool isIdentityCopy(const MachineInstr &MI) const { - unsigned SrcReg, DstReg, SrcSubIdx, DstSubIdx; + bool isIdentityCopy(const MachineInstr &MI, + unsigned &SrcReg, unsigned &DstReg, + unsigned &SrcSubIdx, unsigned &DstSubIdx) const { if (isMoveInstr(MI, SrcReg, DstReg, SrcSubIdx, DstSubIdx) && SrcReg == DstReg) return true; - if (MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG && - MI.getOperand(0).getReg() == MI.getOperand(1).getReg()) - return true; + if (MI.getOpcode() == TargetInstrInfo::EXTRACT_SUBREG) { + DstReg = MI.getOperand(0).getReg(); + DstSubIdx = MI.getOperand(0).getSubReg(); + SrcReg = MI.getOperand(1).getReg(); + SrcSubIdx = MI.getOperand(1).getSubReg(); + return DstReg == SrcReg; + } + + if (MI.getOpcode() == TargetInstrInfo::INSERT_SUBREG || + MI.getOpcode() == TargetInstrInfo::SUBREG_TO_REG) { + DstReg = MI.getOperand(0).getReg(); + DstSubIdx = MI.getOperand(0).getSubReg(); + SrcReg = MI.getOperand(2).getReg(); + SrcSubIdx = MI.getOperand(2).getSubReg(); + return DstReg == SrcReg; + } - if ((MI.getOpcode() == TargetInstrInfo::INSERT_SUBREG || - MI.getOpcode() == TargetInstrInfo::SUBREG_TO_REG) && - MI.getOperand(0).getReg() == MI.getOperand(2).getReg()) - return true; return false; } |