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| author | Tim Northover <tnorthover@apple.com> | 2013-08-23 10:16:39 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2013-08-23 10:16:39 +0000 |
| commit | 287c84a0b45cc826b1200f4cf4be3547d2fcd69c (patch) | |
| tree | fc90a61d9c87bbf321ddc29b2ce8af28b49957dc | |
| parent | c73488a38ecb26340604706003e84cff7bd48ddf (diff) | |
| download | external_llvm-287c84a0b45cc826b1200f4cf4be3547d2fcd69c.zip external_llvm-287c84a0b45cc826b1200f4cf4be3547d2fcd69c.tar.gz external_llvm-287c84a0b45cc826b1200f4cf4be3547d2fcd69c.tar.bz2 | |
ARM: make sure ARM-mode pseudo-inst requires IsARM
I'd forgotten that "Requires" blocks override rather than add to the
constraints, so my pseudo-instruction was being selected in Thumb mode leading
to nonsense instructions.
rdar://problem/14817358
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189096 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 2 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/thumb2-select.ll | 11 |
2 files changed, 11 insertions, 2 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index a4ea69f..df64a09 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -4197,7 +4197,7 @@ def MOVCCi32imm 8, IIC_iCMOVix2, [(set GPR:$Rd, (ARMcmov GPR:$false, imm:$src, cmovpred:$p))]>, - RegConstraint<"$false = $Rd">, Requires<[HasV6T2]>; + RegConstraint<"$false = $Rd">, Requires<[IsARM, HasV6T2]>; let isMoveImm = 1 in def MVNCCi : ARMPseudoInst<(outs GPR:$Rd), diff --git a/test/CodeGen/Thumb2/thumb2-select.ll b/test/CodeGen/Thumb2/thumb2-select.ll index c4d4480..5f5fa19 100644 --- a/test/CodeGen/Thumb2/thumb2-select.ll +++ b/test/CodeGen/Thumb2/thumb2-select.ll @@ -99,8 +99,17 @@ entry: define i32 @f10(i32 %a, i32 %b) { ; CHECK-LABEL: f10: -; CHECK: movwne r2, #1234 @ encoding: [0x40,0xf2,0xd2,0x42] +; CHECK: movwne {{r[0-9]+}}, #1234 @ encoding: [0x40,0xf2,0xd2,0x4{{[0-9a-f]+}}] %tst = icmp ne i32 %a, %b %val = select i1 %tst, i32 1234, i32 12345 ret i32 %val } + +; Make sure we pick the Thumb encoding for movw/movt +define i32 @f11(i32 %a, i32 %b) { +; CHECK-LABEL: f11: +; CHECK: movwne {{r[0-9]+}}, #50033 @ encoding: [0x4c,0xf2,0x71,0x3{{[0-9a-f]+}}] + %tst = icmp ne i32 %a, %b + %val = select i1 %tst, i32 123454321, i32 543212345 + ret i32 %val +} |