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author | Sanjiv Gupta <sanjiv.gupta@microchip.com> | 2009-12-29 03:24:34 +0000 |
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committer | Sanjiv Gupta <sanjiv.gupta@microchip.com> | 2009-12-29 03:24:34 +0000 |
commit | fdf44dc67a9889fe31e9a16c68aa5d609b0df450 (patch) | |
tree | f5d4e984cf1c600598a0a6cc8a105db636f88e81 | |
parent | 4654d24d9e7c08fd239df42a18b21faf1651076b (diff) | |
download | external_llvm-fdf44dc67a9889fe31e9a16c68aa5d609b0df450.zip external_llvm-fdf44dc67a9889fe31e9a16c68aa5d609b0df450.tar.gz external_llvm-fdf44dc67a9889fe31e9a16c68aa5d609b0df450.tar.bz2 |
Extern declaration for unordered.f32 libcall was not being emitted. Fixed that.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92242 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r-- | lib/Target/PIC16/PIC16ISelLowering.cpp | 1 | ||||
-rw-r--r-- | test/CodeGen/PIC16/C16-15.ll | 44 |
2 files changed, 45 insertions, 0 deletions
diff --git a/lib/Target/PIC16/PIC16ISelLowering.cpp b/lib/Target/PIC16/PIC16ISelLowering.cpp index 3ab3f71..9f093e8 100644 --- a/lib/Target/PIC16/PIC16ISelLowering.cpp +++ b/lib/Target/PIC16/PIC16ISelLowering.cpp @@ -226,6 +226,7 @@ PIC16TargetLowering::PIC16TargetLowering(PIC16TargetMachine &TM) setLibcallName(RTLIB::DIV_F32, getIntrinsicName(RTLIB::DIV_F32)); // Floationg point comparison + setLibcallName(RTLIB::O_F32, getIntrinsicName(RTLIB::O_F32)); setLibcallName(RTLIB::UO_F32, getIntrinsicName(RTLIB::UO_F32)); setLibcallName(RTLIB::OLE_F32, getIntrinsicName(RTLIB::OLE_F32)); setLibcallName(RTLIB::OGE_F32, getIntrinsicName(RTLIB::OGE_F32)); diff --git a/test/CodeGen/PIC16/C16-15.ll b/test/CodeGen/PIC16/C16-15.ll new file mode 100644 index 0000000..2e1dc0c --- /dev/null +++ b/test/CodeGen/PIC16/C16-15.ll @@ -0,0 +1,44 @@ +; RUN: llc < %s -march=pic16 | grep "extern @.lib.unordered.f32" | count 3 + +@pc = global i8* inttoptr (i64 160 to i8*), align 1 ; <i8**> [#uses=2] +@aa = common global i16 0, align 1 ; <i16*> [#uses=0] +@c6214.auto.d = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1] +@c6214.auto.l = internal global float 0.000000e+00, align 4 ; <float*> [#uses=1] + +define float @dvalue(float %f) nounwind { +entry: + ret float %f +} + +define void @_assert(i16 %line, i16 %result) nounwind { +entry: + %add = add i16 %line, %result ; <i16> [#uses=1] + %conv = trunc i16 %add to i8 ; <i8> [#uses=1] + %tmp2 = load i8** @pc ; <i8*> [#uses=1] + store i8 %conv, i8* %tmp2 + ret void +} + +define i16 @main() nounwind { +entry: + %retval = alloca i16, align 1 ; <i16*> [#uses=2] + store i16 0, i16* %retval + call void @c6214() + %0 = load i16* %retval ; <i16> [#uses=1] + ret i16 %0 +} + +define internal void @c6214() nounwind { +entry: + %call = call float @dvalue(float 0x3FF3C0CA40000000) ; <float> [#uses=3] + store float %call, float* @c6214.auto.d + store float %call, float* @c6214.auto.l + %cmp = fcmp ord float %call, 0.000000e+00 ; <i1> [#uses=1] + %conv = zext i1 %cmp to i16 ; <i16> [#uses=1] + call void @_assert(i16 10, i16 %conv) + %tmp3 = load i8** @pc ; <i8*> [#uses=2] + %tmp4 = load i8* %tmp3 ; <i8> [#uses=1] + %sub = add i8 %tmp4, -10 ; <i8> [#uses=1] + store i8 %sub, i8* %tmp3 + ret void +} |