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| author | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
|---|---|---|
| committer | Stephen Hines <srhines@google.com> | 2014-05-29 02:49:00 -0700 |
| commit | dce4a407a24b04eebc6a376f8e62b41aaa7b071f (patch) | |
| tree | dcebc53f2b182f145a2e659393bf9a0472cedf23 /configure | |
| parent | 220b921aed042f9e520c26cffd8282a94c66c3d5 (diff) | |
| download | external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.zip external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.gz external_llvm-dce4a407a24b04eebc6a376f8e62b41aaa7b071f.tar.bz2 | |
Update LLVM for 3.5 rebase (r209712).
Change-Id: I149556c940fb7dc92d075273c87ff584f400941f
Diffstat (limited to 'configure')
| -rwxr-xr-x | configure | 12 |
1 files changed, 5 insertions, 7 deletions
@@ -4151,7 +4151,7 @@ else amd64-* | x86_64-*) llvm_cv_target_arch="x86_64" ;; sparc*-*) llvm_cv_target_arch="Sparc" ;; powerpc*-*) llvm_cv_target_arch="PowerPC" ;; - arm64*-*) llvm_cv_target_arch="ARM64" ;; + arm64*-*) llvm_cv_target_arch="AArch64" ;; arm*-*) llvm_cv_target_arch="ARM" ;; aarch64*-*) llvm_cv_target_arch="AArch64" ;; mips-* | mips64-*) llvm_cv_target_arch="Mips" ;; @@ -4188,7 +4188,7 @@ case $host in amd64-* | x86_64-*) host_arch="x86_64" ;; sparc*-*) host_arch="Sparc" ;; powerpc*-*) host_arch="PowerPC" ;; - arm64*-*) host_arch="ARM64" ;; + arm64*-*) host_arch="AArch64" ;; arm*-*) host_arch="ARM" ;; aarch64*-*) host_arch="AArch64" ;; mips-* | mips64-*) host_arch="Mips" ;; @@ -5103,8 +5103,6 @@ else ;; ARM) TARGET_HAS_JIT=1 ;; - AArch64) TARGET_HAS_JIT=0 - ;; Mips) TARGET_HAS_JIT=1 ;; XCore) TARGET_HAS_JIT=0 @@ -5122,7 +5120,7 @@ else esac fi -TARGETS_WITH_JIT="AArch64 ARM ARM64 Mips PowerPC SystemZ X86" +TARGETS_WITH_JIT="ARM AArch64 Mips PowerPC SystemZ X86" TARGETS_WITH_JIT=$TARGETS_WITH_JIT @@ -5359,7 +5357,7 @@ _ACEOF fi -ALL_TARGETS="X86 Sparc PowerPC AArch64 ARM ARM64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600" +ALL_TARGETS="X86 Sparc PowerPC ARM AArch64 Mips XCore MSP430 CppBackend NVPTX Hexagon SystemZ R600" ALL_TARGETS=$ALL_TARGETS @@ -5383,7 +5381,7 @@ case "$enableval" in sparc) TARGETS_TO_BUILD="Sparc $TARGETS_TO_BUILD" ;; powerpc) TARGETS_TO_BUILD="PowerPC $TARGETS_TO_BUILD" ;; aarch64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;; - arm64) TARGETS_TO_BUILD="ARM64 $TARGETS_TO_BUILD" ;; + arm64) TARGETS_TO_BUILD="AArch64 $TARGETS_TO_BUILD" ;; arm) TARGETS_TO_BUILD="ARM $TARGETS_TO_BUILD" ;; mips) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; mipsel) TARGETS_TO_BUILD="Mips $TARGETS_TO_BUILD" ;; |