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author | Duncan Sands <baldrick@free.fr> | 2012-11-16 12:36:39 +0000 |
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committer | Duncan Sands <baldrick@free.fr> | 2012-11-16 12:36:39 +0000 |
commit | dc7f174b5e049172f085ff5957f58998bdc446a4 (patch) | |
tree | 1e5d42f7a98159ac67d5222a39a0bbc9892ea3aa /docs | |
parent | c5519d3b26463f4d5c38e2b878d320edbab77f57 (diff) | |
download | external_llvm-dc7f174b5e049172f085ff5957f58998bdc446a4.zip external_llvm-dc7f174b5e049172f085ff5957f58998bdc446a4.tar.gz external_llvm-dc7f174b5e049172f085ff5957f58998bdc446a4.tar.bz2 |
Add the Erlang/HiPE calling convention, patch by Yiannis Tsiouris.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@168166 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'docs')
-rw-r--r-- | docs/CodeGenerator.rst | 4 | ||||
-rw-r--r-- | docs/LangRef.html | 27 |
2 files changed, 23 insertions, 8 deletions
diff --git a/docs/CodeGenerator.rst b/docs/CodeGenerator.rst index 21af969..104b848 100644 --- a/docs/CodeGenerator.rst +++ b/docs/CodeGenerator.rst @@ -1982,8 +1982,8 @@ Tail call optimization Tail call optimization, callee reusing the stack of the caller, is currently supported on x86/x86-64 and PowerPC. It is performed if: -* Caller and callee have the calling convention ``fastcc`` or ``cc 10`` (GHC - call convention). +* Caller and callee have the calling convention ``fastcc``, ``cc 10`` (GHC + calling convention) or ``cc 11`` (HiPE calling convention). * The call is a tail call - in tail position (ret immediately follows call and ret uses value of call or is void). diff --git a/docs/LangRef.html b/docs/LangRef.html index b4dd976..b1ed4e6 100644 --- a/docs/LangRef.html +++ b/docs/LangRef.html @@ -729,10 +729,10 @@ define i32 @main() { <i>; i32()* </i> target to use whatever tricks it wants to produce fast code for the target, without having to conform to an externally specified ABI (Application Binary Interface). - <a href="CodeGenerator.html#tailcallopt">Tail calls can only be optimized - when this or the GHC convention is used.</a> This calling convention - does not support varargs and requires the prototype of all callees to - exactly match the prototype of the function definition.</dd> + <a href="CodeGenerator.html#id80">Tail calls can only be optimized + when this, the GHC or the HiPE convention is used.</a> This calling + convention does not support varargs and requires the prototype of all + callees to exactly match the prototype of the function definition.</dd> <dt><b>"<tt>coldcc</tt>" - The cold calling convention</b>:</dt> <dd>This calling convention attempts to make code in the caller as efficient @@ -749,7 +749,7 @@ define i32 @main() { <i>; i32()* </i> disabling callee save registers. This calling convention should not be used lightly but only for specific situations such as an alternative to the <em>register pinning</em> performance technique often used when - implementing functional programming languages.At the moment only X86 + implementing functional programming languages. At the moment only X86 supports this convention and it has the following limitations: <ul> <li>On <em>X86-32</em> only supports up to 4 bit type parameters. No @@ -758,10 +758,25 @@ define i32 @main() { <i>; i32()* </i> 6 floating point parameters.</li> </ul> This calling convention supports - <a href="CodeGenerator.html#tailcallopt">tail call optimization</a> but + <a href="CodeGenerator.html#id80">tail call optimization</a> but requires both the caller and callee are using it. </dd> + <dt><b>"<tt>cc <em>11</em></tt>" - The HiPE calling convention</b>:</dt> + <dd>This calling convention has been implemented specifically for use by the + <a href="http://www.it.uu.se/research/group/hipe/">High-Performance Erlang + (HiPE)</a> compiler, <em>the</em> native code compiler of the + <a href="http://www.erlang.org/download.shtml">Ericsson's Open Source + Erlang/OTP system</a>. It uses more registers for argument passing than + the ordinary C calling convention and defines no callee-saved registers. + The calling convention properly supports + <a href="CodeGenerator.html#id80">tail call optimization</a> but requires + that both the caller and the callee use it. It uses a <em>register + pinning</em> mechanism, similar to GHC's convention, for keeping + frequently accessed runtime components pinned to specific hardware + registers. At the moment only X86 supports this convention (both 32 and 64 + bit).</dd> + <dt><b>"<tt>cc <<em>n</em>></tt>" - Numbered convention</b>:</dt> <dd>Any calling convention may be specified by number, allowing target-specific calling conventions to be used. Target specific calling |